Torsten Alt, Kjetil Ullaland, Matthias Richter, Ketil Røed, Johan Alme

Slides:



Advertisements
Similar presentations
TPC / PHOS / HLT Readout Electronics overview Annual Evaluation Meeting for CERN-related Research in Norway November, 2004 University of Oslo Kjetil.
Advertisements

Normal text - click to edit Status Report TPC Electronics Meeting, CERN Johan Alme & Ketil Røed, UoB.
Normal text - click to edit Trigger interface module Kjetil Ullaland, Sten Solli, Johan Alme TPC Electronics meeting. CERN Jan 2005.
UNIVERSITY OF BERGEN DEPARTMENT OF PHYSICS 1 UiB DR 2003 High Level API for the TPC-FEE control and configuration.
5 March DCS Final Design Review: RPC detector The DCS system of the Atlas RPC detector V.Bocci, G.Chiodi, E. Petrolo, R.Vari, S.Veneziano INFN Roma.
Normal text - click to edit RCU – DCS system in ALICE RCU design, prototyping and test results (TPC & PHOS) Johan Alme.
Remote Firmware Down Load. Xilinx V4LX25 Altera Stratix Control Altera Stratix Control Xilinx V4FX20 EPROM XCF08 EPROM XCF08 EPROM EPC16 EPROM EPC16 EPROM.
Normal text - click to edit Configuring of Xilinx Virtex-II Kjetil Ullaland, Ketil Røed, Bjørn Pommeresche, Johan Alme TPC Electronics meeting. CERN
Status-report TPC Electronics Meeting Dieter Röhrich, Kjetil Ullaland, Ketil Røed, Mattias Richter, Sebastian Bablok, Johan Alme.
RCU Status 1.RCU design 2.RCU prototypes 3.RCU-SIU-RORC integration 4.RCU system for TPC test 2002 HiB, UiB, UiO.
Bernardo Mota (CERN PH/ED) 17/05/04ALICE TPC Meeting Progress on the RCU Prototyping Bernardo Mota CERN PH/ED Overview Architecture Trigger and Clock Distribution.
Status report on the development of a readout system based on the SALTRO-16 chip Leif Jönsson Lund University LCTPC Collaboration Meeting
1 Dong Wang, Yaping Wang, Changzhou Xiang, Zhongbao Yin, Fan Zhang, Daicui Zhou (Huazhong Normal University, China) Status and planning on common readout.
Xiangming Sun1PXL Sensor and RDO review – 06/23/2010 STAR XIANGMING SUN LAWRENCE BERKELEY NATIONAL LAB Firmware and Software Architecture for PIXEL L.
Alexei SemenovGeneric Digitizer Generic Digitizer 10MHZ 16 bit 6U VME Board.
Sep. 17, 2002BESIII Review Meeting BESIII DAQ System BESIII Review Meeting IHEP · Beijing · China Sep , 2002.
26/11/02CROP meeting-Nicolas Dumont Dayot 1 CROP (Crate Read Out Processor)  Specifications.  Topology.  Error detection-correction.  Treatment (ECAL/HCAL.
Clara Gaspar, December 2012 Experiment Control System & Electronics Upgrade.
1 SysCore for N-XYTER Status Report Talk by Dirk Gottschalk Kirchhoff Institut für Physik Universität Heidelberg.
Clara Gaspar on behalf of the ECS team: CERN, Marseille, etc. October 2015 Experiment Control System & Electronics Upgrade.
Readout Control Unit of the Time Projection Chamber in ALICE Presented by Jørgen Lien, Høgskolen i Bergen / Universitetet i Bergen / CERN Authors: Håvard.
H-RORC HLT-Meeting CERN 02/06/05 Torsten Alt KIP Heidelberg.
Marc R. StockmeierDCS-meeting, CERN DCS status ● DCS overview ● Implementation ● Examples – DCS board.
ESDG Mtg 15th April CMS-FED Production FEDv1 Productions Jan 2003 : 2 boards. Working. June 2003 : 3.
The ALICE TPC Readout Control Unit 10th Workshop on Electronics for LHC and future Experiments 13 – 17 September 2004, BOSTON, USA Carmen González Gutierrez.
Radiation Tolerance Studies using Fault Injection on the Readout Control FPGA Design of the ALICE TPC Detector Johan Alme Bergen University College, Norway.
October 12th 2005 ICALEPCS 2005D.Charlet The SPECS field bus  Global description  Module description Master Slave Mezzanine  Implementation  Link development.
Computer Organization and Architecture + Networks Lecture 6 Input/Output.
The ALICE Data-Acquisition Read-out Receiver Card C. Soós et al. (for the ALICE collaboration) LECC September 2004, Boston.
Backend Control Systems in uTCA HCAL Requirements January 21, 2010 Jeremiah Mans.
Computer Organization and Design
Introduction to Microcontroller Technology
DAQ / Trigger Card for HCAL SLHC Readout E. Hazen - Boston University
Firmware development for the AM Board
Use of FPGA for dataflow Filippo Costa ALICE O2 CERN
The Jülich Digital Readout System for PANDA Developments
Status of the ECL DAQ subsystems
Firmware for the CPLD on the RCU
Novosibirsk, September, 2017
Architectures of Digital Information Systems Part 1: Interrupts and DMA dr.ir. A.C. Verschueren Eindhoven University of Technology Section of Digital.
Test Boards Design for LTDB
I/O SYSTEMS MANAGEMENT Krishna Kumar Ahirwar ( )
Current DCC Design LED Board
ABC130: DAQ Hardware Status Matt Warren et al. Valencia 3 Feb 2014
UNIT – Microcontroller.
Erno DAVID, Tivadar KISS Wigner Research Center for Physics (HU)
Firmware Structure Alireza Kokabi Mohsen Khakzad Friday 9 October 2015
Status of the Front-End Electronics and DCS for PHOS and TPC
The Software Framework available at the ATLAS ROD Crate
1 Input-Output Organization Computer Organization Computer Architectures Lab Peripheral Devices Input-Output Interface Asynchronous Data Transfer Modes.
FMC adapter status Luis Miguel Jara Casas 5/09/2017.
Electronics for Physicists
NSW Electronics workshop, November 2013
xTCA interest group meeting
Radiation Tolerance of an Used in a Large Tracking Detector
Sheng-Li Liu, James Pinfold. University of Alberta
CS703 - Advanced Operating Systems
RCU3 –> RCU4 New Schematics
PCI BASED READ-OUT RECEIVER CARD IN THE ALICE DAQ SYSTEM
This chapter provides a series of applications.
Introduction to Microprocessors and Microcontrollers
New Crate Controller Development
Table 1: The specification of the PSICM and the ePSICM Prototypes
AT91 Memory Interface This training module describes the External Bus Interface (EBI), which generatesthe signals that control the access to the external.
Electronics for Physicists
UNIT-III Pin Diagram Of 8086
TPC Electronics Meeting, 13/01/05 Carmen González Gutiérrez
Chapter 13: I/O Systems.
Presentation transcript:

Torsten Alt, Kjetil Ullaland, Matthias Richter, Ketil Røed, Johan Alme TPC Firmware on DCS Torsten Alt, Kjetil Ullaland, Matthias Richter, Ketil Røed, Johan Alme TPC Electronics meeting. CERN 13-14. Jan 2005

Overview RCU 3 solution DCS RCU communication Changes proposed to suit the new challenge with configuring. Status

RCU 3 solution Modules Ethernet: TTCrx FPGA Config ADC readout Provides access to the ethernet TTCrx Interface to the TTCrx Chip Write/read registers over I2C Maps all the TTCrx registers in a register file in the PLD Decodes L2a/r messages. In case of a L2a message the trigger information is directly transferred over the RCU bus to the Data Assembler module. FPGA Config Configures the RCU-FPGA. ADC readout Monitors the voltages on the DCS JTAG Master Configures neighbour DCS cards.

DCS-RCU Communication The communication between linux (dcs-driver) and RCU modules is done by using messages. A message is written to the memories in the DCS FPGA, and the DCS messagebuffer translates this into RCU-bus commands. Results on the RCU bus is translated back to a message that the dcs-driver can interpret. In the existing solution the same memories are used for configuration of the RCU FPGA.

Proposed changes TTCrx IF is moved to RCU. Serial B Channel will be used for data transmission. Configuring & status of TTCrx will still be on DCS FPGA using I2C interface. Reason: Remove the FPGA on the DCS board from the datapath. Configuring of RCU FPGA is changed. New data interface for shipping and receiving configuration data. Easier interface for programming both FPGA and Flash. Faster Less logic Configuration tasks is mainly handled by the CPLD on the RCU. The DCS Messagebuffer system and the RCU bus will not change.

DCS-RCU Communication Two bus modes: Memory mapped mode. (normal) Transport data interface Used for transport of configuration data. Directly controlled from linux.

DCS-RCU Communication The different instances of the driver (divided by minor-number), maps to different locations on the RCU card

Transport data interface The transport data interface is used for transporting configuration data direct from linux. 32-bit asynchronous bus. Same physical bus lines as the RCU bus. Between the RCU CPLD and the DCS card. Control signal DCS_ctrl[7] is used for switching between Memory mapped bus mode and trasnport bus mode. The CPLD then translates the data into a format understandable for the selectMap bus or the Flash communication. One control signal (dcs_ctrl[6]) is used to select selectMap IF or Flash. 6 control signals.

Transport data interface (DCS-CPLD 32 bit data interface) (Configure_n) Jeg tror jeg må endre busen litt her.. Er ikke helt riktig. Eller den er rett, men jeg må endre forklaringen. Data må klokkes inn på rising edge. Note. If writing to or reading from flash, the first block of data is always the start address in the memory.

Data Format – Transport data interface SelectMap: Data is pushed 32 bit at the time Flash Number of bytes Address in Flash Data

Device driver On the DCS, the transport data interface is controlled directly by the DCS driver. The DCS driver is a device driver that is divided by minor number into different instances depending on use. RCU bus driver Virtex configuration driver Complete interface to selectMap interface in CPLD, including controllines to choose correct bus mode Makes it possible to configure the Virtex-II with a simple cat-command Flash configuration drivers Complete interface to flash interface in CPLD, including control lines to choose correct bus mode. Makes it possible to write to a designated address in the flash memory on the RCU board with a simple cat-command

Status DCS messagebuffer is finished (T Alt). Prototype device driver Virtex_driver is finished. Ongoing work: ADC interfaces TTCrx control module Prototype of Flash device driver Configuration firmware