Detecting elements for the CALICE MAPS design

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Presentation transcript:

Detecting elements for the CALICE MAPS design Questions Detecting elements for the CALICE MAPS design How does the collected charge depend on Diode size? Diode position with respect to the NWELL? Diode bias voltage?

Setup The NWELL is 3 μm wide Diode size and position are variable The location of the MIP track is also variable * The finite length of this structure does not allow full charge collection – some error is introduced Dx Dw NWELL +3.3V Diodes VD reflected charge MIP track substrate (p+) 25 m 50 m X

Question 1 - Diode size The MIP hits at X from the NWELL centre Diode size Dw is variable, Dx = 12 μm

Question 2 - Diode position with respect to the NWELL The MIP hits the centre of the NWELL (X=0) Diode size Dw and their distance from the NWELL Dx are variable

Question 3 - Diode bias voltage The MIP hits at distance 8 μm from centre of the NWELL Diode size Dw and bias are variable, distance from the NWELL Dx is fixed to 12 μm

A movie speaks more than 1000 words The MIP hits at distance 8 μm from the NWELL centre Diode size Dw = 4 μm, 12 μm from the NWELL centre Click to start/stop Depletion regions under the diodes are 3 μm deep. This is clearly visible as the electron density in the depleted regions is small (charge is transported very quickly there – seen as “liquid flow”)

Conclusions Surprisingly, increasing the diode size does not proportionally improve the collection efficiency Should the effect be much stronger in 3D ( ~(Dw)2 rather than ~Dw)? Very important to verify in 3D Placing the diodes next to the NWELL has some effect on reducing the charge loss Diode bias voltage is minor effect This is not a substitute for proper 3D simulation similar to Giulio’s