University of Maryland Baltimore County Department of Computer Science and Electrical Engineering   CMPE 212 Laboratory (Discussion 12) Hasib Hasan ha26@umbc.edu.

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University of Maryland Baltimore County Department of Computer Science and Electrical Engineering   CMPE 212 Laboratory (Discussion 12) Hasib Hasan ha26@umbc.edu Edward Hanson ehanson1@umbc.edu Ankit Baingane ankitb1@umbc.edu 1

Counters A digital circuit usually made of flip-flops that can count the input pulse. In other words, it can generate particular outputs (called “states”) with each input clock pulse. Synchronous: All the flip-flops are fed by a common clock signal and their output changes simultaneously. Asynchronous: Usually one of the flip-flops is fed by an external clock pulse, others get the clock pulse from output of another flip-flop. Also called ‘ripple’ counter

Counters Asynchronous counter Synchronous counter

Counters SYNCHRONOUS COUNTERS ASYNCHRONOUS COUNTERS The propagation delay is very low. Propagation delay is higher than that of synchronous counters. These are faster than that of ripple counters. These are slow in operation. Large number of logic gates are required to design Less number of logic gates required. High cost. Low cost. Synchronous circuits are easy to design. Complex to design. Standard logic packages available for synchronous. For asynchronous counters, Standard logic packages are not available.

Counters Commonly used counters: Decade counter – counts through ten states per stage Up/down counter – counts both up and down, under command of a control input Ring counter – formed by a shift register with feedback connection in a ring Johnson counter – a twisted ring counter Cascaded counter Modulus counter.

Designing Synchronous Counters Step 1: Get the State Diagram We’ll be using this one

Designing Synchronous Counters Step 2 : Develop Next-State Table

Designing Synchronous Counters Step 3 : Develop Flip-Flop Transition Table Choose your Flip-Flop Use corresponding excitation table Note that the no. of required flip-flops is the same as the no. of bits in a state. JK flip-flop excitation table

Designing Synchronous Counters Step 4 : Develop K-Map from the transition table 1 00 X 01 11 10 x 1 00 X 01 11 10 Jo=1 Ko=1

Designing Synchronous Counters Step 5 : Realize the circuit from the function

Designing Synchronous Counters Example: Today’s Lab Problem: Design a counter that will display the following hexadecimal numbers in the given sequence- 9 > 2 > A > 5 > d > 3

Designing Synchronous Counters Step 1: Develop the state diagram: 9 > 2 > A > 5 > d > 3

Designing Synchronous Counters Step 2 and 3: Develop next-state table and transition table: We’ll be using JK flip-flop. J3 K3 J2 K2 J1 K1 J0 K0 0000 - X 0001 0010 1010 1 0011 1001 0100 0101 1101 0110 0111 1000 1011 1100 1110 1111 State diagram Excitation table

Designing Synchronous Counters Step 4: Obtain the function for each inputs using K-map.

Designing Synchronous Counters Step 5: Implement the functions in circuit. We’ll be observing the states in 7-segment display using the decoder IC.

Designing Synchronous Counters Notes: You can use any flip-flip e.g. SR, D or T flip-flop to design the counter. No. of flip-flops to be used is the same as the no. of bits in a state If you want to use D or T flip-flop, you can use JK flip- flop to implement them as the following-

IC 9368 for interfacing the 7-segment display:

Final Assignment and Test It will carry 25% of the total points for the lab. It consists of 2 parts- Written assignment to be submitted at the beginning of the next lab. You have to make the circuit in lab that you’ll design in the assignment.

Final Assignment and Test Written assignment: You need to design a counter. The states you need to display are assigned individually at the end of the slide. You need to develop the following in the assignment- State diagram State table and transition table (mention clearly which flip-flop you’ll be using). K-map for each flip-flop and the function for each input in terms of outputs. Full circuit diagram of the counter. ii)

Final Assignment and Test Lab task: Implement your designed circuit in the lab. Notes: 1. Keep a copy of your designed circuit in the lab so that you can follow it while making circuit. 2. Be careful about the ICs you’ll be using. For JK flip-flop, check if it’s 7476 or 74112. For 7-segment display, check for IC 14495 or 9368. 3. If your circuit doesn’t work in the lab, submit a detailed circuit diagram showing the connection for each pin. You’ll get most of your points.

Questions? 21