Kanwaljeet Singh, Lovely Professional University.

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Presentation transcript:

Kanwaljeet Singh, Lovely Professional University. Memory-Mapped I/O 9/21/2018

Memory mapped I/O interfacing In memory- mapped I/O interfacing , the I/O devices are considered as a memory locations. I/O devices are being identified by 16- address. To transfer the data b/w MPU and I/O devices, memory related instructions(STA,LDA & etc) and Memory control signal(MEMR(AL) and MEMW(AL)) are used . Kanwaljeet Singh, Lovely Professional University. 9/21/2018

If the o/p device is connected Instead of m/y register, the A-Reg To understand the memory mapped I/O interfacing , we required to know how data byte is transferred from MPU to M/Y location and Vice-Versa.. Consider instruction to transfer the contents of A- reg to memory location 526Ah. If the o/p device is connected Instead of m/y register, the A-Reg Contents will be transferred to O/P device. This technique is called as Memory- Mapped I/O Kanwaljeet Singh, Lovely Professional University. 9/21/2018

Let us now Consider LDA instruction(I/O to MY) LDA 2001h Consider this 2001 Is the address of i/p device specified by LDA Memr and Memw control signal should be connected to I/O devices instead of IOR and IOW(AL) Kanwaljeet Singh, Lovely Professional University. 9/21/2018

Kanwaljeet Singh, Lovely Professional University. 9/21/2018 Latch : Kanwaljeet Singh, Lovely Professional University. 9/21/2018

Device selection and Data transfer in M/y-mapped I/O requires 3 steps Decode the address bus to generate the address Pulse AND the control signal with device address pulse and generate the device select(I/O select ) pulse Use the device select pulse to enable the I/O port Kanwaljeet Singh, Lovely Professional University. 9/21/2018

Read: LDA FFF9H; read the switches CMA; Compliment switch reading STA FFF8H; Send the switch positions to output port and turn on/OFF appliances JMP READ; goes back and read again Kanwaljeet Singh, Lovely Professional University. 9/21/2018

comparision Device address is 8 bit Control signals IOR and IOW Memory-mapped I/O Peripheral I/O Device address is 16 bit Control signal MEMR and MEMW(AL) Instructions (STA,LDA,MOV M,R) Data transfer is between any register and I/O More hardware is needed to decode 16-bit address Device address is 8 bit Control signals IOR and IOW Instructions like IN and OUT is only is used Data transfer is between I/O and accumulator Less hardware is needed to decode 8 bit address. Kanwaljeet Singh, Lovely Professional University. 9/21/2018