Instructor: Dr. Phillip Jones CPRE 584 Models and Techniques in Embedded Systems Lecture 1: Tue 1/15/2013 (Class overview) Instructor: Dr. Phillip Jones (phjones@iastate.edu) Reconfigurable Computing Laboratory Iowa State University Ames, Iowa, USA http://www.ece.iastate.edu http://class.ece.iastate.edu/cpre584

Introduction Aims to provide the set of skills needed for students to perform graduate level research in the area of Hardware/Software codesign. Introduces several Models and Techniques in Embedded Systems. Gives many opportunities for hands on learning.

Skills Provide a research like environment Learn to quickly pickup new hardware platforms new software tools new protocols Gain experience with Debugging Design methodologies

Skills Reinforce common skills with hands on examples Using and defining interfaces for moving data Cross platform development environments Platform Performance analysis, and Bottle Neck identification Architecture design

High-level Timeline Platforms (January) Convey HC-2: High Performance Software/Hardware co-design Graphics Processing Unit (GPU) HW/SW Competition Preparation (February) Hands on experience acceleration: Acceleration challenges with HC-2 HW/SW co-design Competition (March) MemoCODE Mini-Projects (April) Convey Project

Platforms (January/February) Xilinx ISE with Convey (2-3 weeks) HW/SW co-design (IP integration) Weekly assignments (In groups of 3 students) Focused documentation reading on learning what is necessary to solve problems Explore features beyond assignment, and report back to the class. Discussion in class different approaches taken

MemoCODE (March) International Competition Problem assigned on March 1, solution due March 31 Work as a class to apply experienced gained to: Break problem down Architect solution Implement solution Win!! 2008/2009/2010/2011/2012 MemoCODE example

Application Acceleration (April) 4 week mini-project using the Convey Platform Teams of 2-4, project of your choice

Syllabus http://class.ece.iastate.edu/cpre584

Assignment Groups of three Review Convey System Architecture documentation Challenge: Prepare 7-10 slides to discuss with class An aspect of the Convey Platform or Development infrastructure you choose to explore. Implement Covey’s Vector adder example. Each member must make one contribution to the wiki each week. Problem set 1: Will be released Thursday morning. Next week Continue Convey Overview