Improved Crosstalk Modeling for Noise Constrained Interconnect Optimization Jason Cong, David Zhigang Pan & Prasanna V. Srinivas Department of Computer Science, UCLA Magma Design Automation, Inc. 2 Results Way, Cupertino, CA 95014

Motivation Deep sub-micron net designs have higher aspect ratio (height /width ) Height is not reducing not same as width is reducing Make a simple and accurate modeling to calculate noise analysis in circuit Increased coupling capacitance between nets compared to previous process Longer propagation delay or Shorter propagation delay Increased logic errors --- Glitch Analysis

Motivation Reduced noise margins Crosstalk cannot be ignored Lower supply voltages Dynamic Logic Lower Vt Crosstalk cannot be ignored It can cause low yield and low performance

Aggressor / Victim Network Assuming idle victim net Ls: Interconnect length before coupling Lc: Interconnect length of coupling Le: Interconnect length after coupling Aggressor has clock slew tr

2-π Model Victim net is modeled as 2 π-RC circuits Rd: Victim drive resistance Cx is ased to be in middle of Lc, Cx is decreasing as distance is increasing victim / aggressor coupling capacitance Rise time

2-π Model Parameters Aggressor Victim

Analytical Solution

Analytical Solution part 2 s-domain output voltage Transform function H(s)

Analytical Solution part 3 Aggressor input signal Output voltage

Simplification of Closed Form Solution Closed form solution complicated Non-intuitive Noise peak amplitude, noise width? Dominant-pole approximation method

Dominant-Pole Simplification RC delay from upstream resistance of coupling element Elmore delay of victim net

Intuition of Dominant Pole Simplification vout rises until tr and decays after vmax evaluated at tr

Extension to RC Trees Similar to previous model with addition of lumped capacitances Extended to a victim net in general RC tree structure

Results Average errors of 4% comparing to HSPICE in peak noise and noise width. Devgan model 589% Vittal model 9% 95% of nets have errors less than 10%

Spice Comparison peak noise noise width

Effect of Aggressor Location As aggressor is moved close to receiver, peak noise is increased Ls varies from 0 to 1mm Lc has length of 1mm Le varies from 1mm to 0

Optimization Rules Rule 1: Rule 2: If RsC1 < ReCL Sizing up victim driver will reduce peak noise If RsC1 > ReCL and tr << tv Driver sizing will not reduce peak noise Rule 2: Noise-sensitive victims should avoid near-receiver coupling

Optimization Rules part 2 Preferred position for shield insertion is near a noise sensitive receiver Rule 4: Wire spacing is an effective way to reduce noise Rule 5: Noise amplitude-width product has lower bound And upper bound

Conclusions 2-π model achieves results within 6% error of HSPICE simulation for crosstalk noise model. Dominant node simplification gives intuition to important parameters Design rules established to reduce noise