DAEDUCK Micro via PCB 8 12 9.

Slides:



Advertisements
Similar presentations
1 New build-up technique with copper bump AGP Process.
Advertisements

SMG facility – 24k Square Feet. Drilling We have 7 fully automated Excellon Drilling/ Routing machines. The drilling program is generated from the customer.
Preparing Printed Circuit Boards (PCBs) for Flight Computers AEM 1905, Fall 2008.
What determines impedance ?
Printed Wiring Board Fabrication. Imaging For feature sizes less than 200μm, use photolithography process 1.Clean surface 2.Apply photoresist 3.Expose.
Sierra Proto Express Introducing our Micro Electronics Division.
Manufacturing Processes for a 4 Layer Multi-layer PCB Section through PCB Via hole SMD Pad The following presentation covers the main processes during.
EMS1EP Lecture 3 Intro to Soldering Dr. Robert Ross.
Produce Your Own PCB Board Jack Ou Engineering Science Sonoma State University.
Produce Your Own PCB Board Jack Ou Engineering Science Sonoma State University.
One Way Circuits Limited Printed Circuit Board Manufacturer A Guide To Manufacturing Multilayer PCBs Use Left and Right Cursor keys to navigate ESC to.
Corporate Presentation Introduction OurPCB Tech Limited was found in 2005, it provides professional PCB&PCBA service for over than 1500 customers around.
Manufacturers Profile Prototype, small to medium, quick turn production in Taiwan High volume production in China available Certificates : ISO/TS
Customized equipment for Printed circuit board industry Microelectronic industry Solar cell industry.
Printed Circuit Board Design
Update Hardware for conductive cooling of the quench resistors has been fabricated at LBNL. Preparation for installation to start this week. Installation.
Your PCB partner.
RD51 22/11/2011 RD51 22/11/2011 Your PCB partner RD51 22/11/2011.
High Mix Low Volume High Tech. Shenzhen Sunshine Circuits Phase I Phase II ~1000km north of Shenzhen Sunshine. 3km to Long River New Factory in Jiujiang,
4/11/2011Rui de Oliveira1.  Collection of the biggest PCB failures we’ve seen at CERN workshop since 10 years.  The PTH (plated through hole) is the.
Demands for Producing IPC Class 3! Lars-Olof Wallin IPC European Representative Seminar MITT University
BUILDING HDI STRUCTURES USING
PRACTICAL ELECTRONICS MASTERCLASS (Mr Bell) 1. Basic Electronic Components These components will be discussed further during the course, also have a look.
1/20 Passive components and circuits - CCP Lecture 13.
F. Formenti - November 22nd, Visit to NewFlex technology WHEN:September 5 th, 2011 (“detour return trip” after Kobe’s RD51 meeting) WHO: From CERN.
Cu 2 O deposition Process. 2 Rhodia Kermel Summary Concept presentation Technical requirements Process description Advantages.
PCB manufacturing PCBpro.com.
Suggestions:  Our class found that Yanka was Idea for creating PCB Board Layouts.  Yanka allows a user to print off a bill of materials. (It includes.
World Class Manufacturer of Printed Circuit Boards.
Customer Satisfaction is Always Our First Priority!
CERN Rui de OliveiraTS-DEM TS-DEM Development of Electronic Modules Rui de Oliveira CERN CERN hybrid production experience (or how to stay out of trouble)
Electronic Pack….. Chapter 5: Printed Wiring Boards Slide 1 Chapter 5: Printed Wiring Boards.
Company Profile XIAMEN G&P ELECTRONICS CO., LTD. Jiayi Industrial Park, Huli District Xiamen, Fujian province, China TEL: FAX:
Piotr Bielówka ul. Muchoborska 18 PL Wrocław Phone: Phone/Fax E -mail: 22 nd.
CERN Workshop upgrade Rui De Oliveira KOBE WG6 WG6 9/1/20111Rui De Oliveira.
CERN Rui de OliveiraTS-DEM TS-DEM Development of Electronic Modules Rui de Oliveira CERN State of the art technologies for front-end hybrids.
THGEM-process Rui De Oliveira RD51 22/11/2011 WG6 WG6 22/11/20111Rui De Oliveira.
Technology Road Map Imaging And Etching Trace / Space Outers * Current
Low Mass Rui de Oliveira (CERN) July
26/05/2009Rui de Oliveira1 PH ESE seminar 26/05/2009.
The Development of the Fabrication Process of Low Mass circuits Rui de Oliveira TS-DEM.
How to make a PCB.
PCB Design Overview Lecture 11
TYPE 1 HDI Boards Design Rule
Cooling of GEM detector CFD _GEM 2012/03/06 E. Da RivaCFD _GEM1.
ASE ASE Flip-Chip Laminate Substrate Design ASE Flip-Chip Laminate Substrate Design Date : 07/15/03 Rev. H.
Making it at home. What is a PCB ?  A PCB contains a fiber glass epoxy board with thin copper layers attached to it.  A photographic process is used.
Low Mass Alice Pixel Bus Rui de Oliveira TE/MPE/EM 6/9/20161Rui de Oliveira Alice worshop.
 A PCB is printed circuit board, also known as a printed wiring board. It is used in electronics to build electronic devices. A PCB serves 2 purposes.
11
傳 統 印 刷 電 路 板 流 程 介 紹傳 統 印 刷 電 路 板 流 程 介 紹 傳 統 印 刷 電 路 板 流 程 介 紹傳 統 印 刷 電 路 板 流 程 介 紹 Conventional PCB Manufacturing Process 1 SHEARING D/F PHOTO IMAGE.
A SEMINAR PRESENTATION ON EICHER ENGINE
IPC Special Tooling During the formal design review prior to layout, special tooling that can be generated by the design area in the form of.
Workshop How to make a PCB
New Build Up Process Neo Manhattan Bump Interconnection (NMBI) NMBI Bumped Cu Foil Process Comparison NMBI Key Features, Design Features Substrate Technical.
Company Introduction SE GYUNG HI TECH CO., LTD The Perfect
April 4th , 2016 Seo, Dong-yoon SKKU EMC Laboratory
Large volume GEM production Rui De Oliveira TE/MPE/EM
Designing Process Of Printed Circuit Boards
Quality Control Chamber Production
CAF Resistant, Low CTE FR-4 Dielectric Substrate
Recommendations for Processing with MLS Copper
Fabrication of Nb and Cu SPL cavities and required tools CERN status
ELECTRONIC CIRCUIT DESIGN & MANUFACTURE
What determines impedance ?
Excellence PCB Co., Ltd Profile
Global Expert Technologies
General Capability Parameters Feature Y2017 Y2018 Y2019 Standard
Military/Aerospace PCB
Presentation transcript:

DAEDUCK Micro via PCB 8 12 9

Build Up Status of DAEDUCK 8 12 9

New Factory for Build-Up Boards (Daeduck Bisuness Unit #2) Inspection PSR RCC Press Image /Etching Cu Plating AOI Laser drill Gold Plating

Mass Production Schedule 8 12 9

Laser Micro Via Process Flow Inner Layer RCC Lamination by Hot Press Dry Film Lamination Window Image Developing Window Etching Stripping Dry Film Laser Drilling Desmear (Hall Cleaning) Copper Plating 3 3 6

- Manufacturing Flow (Conventional PCB) 8 12 9

- Manufacturing Flow (Type-A) 8 12 9

- Manufacturing Flow (Type-B) 8 12 9

- Manufacturing Flow (TYPE-C) 8 12 9

Daeduck Bluld-Up Board Types (6Layer) 1 4 1

Daeduck Bluld-Up Board Types (8Layer) 1 4 1

Detailed Design Rule Laser Micro Via Hole Design Rule Schematic Diagram of LVH C B A A C B B A C D C B A 1-2 LVH 2-3 LVH 1-3 LVH 1-2-3 LVH 1 4 1

Mechanical Hole Design Rule B C IVH PTH Line Width/Space Design Rule OW OS IW IS 1 4 1

Daeduck Laser Drilling 1st shot 2nd shot 3rd shot Cross-section of Φ120㎛ Laser Via mobile phone peaces per month 8 13 9

Laser Via Hole Reliability Data 1. Thermal Cycle Test 1) Specification Thermal Cycle Test : IPC TM-650-2.6.7.2, NPS25001 5.2.3.1 Condition : -55℃/15min - +125℃/15min Machine : BOTSCH VI7012 S2 / 2chambers / transfer time less than 10sec. Evaluation : Resistance change less than 10% 2) Result Resistance change (%) cycle - Resistance change less than 3% : OK 8 13 9

- No Open&Short After Hot Oil Dip 2. Hot Oil Dip Test ( Micro Via Reliability ) Bare Board Tester 1) Specification Good Boards Daeduck Spec. Evaluation : Have to stand 5times of Hot Oil Dip Purpose : Laser Via Hole Reliability (Cracked laser via holes result in OPEN’s) Cool water quenching 200℃ PEG 1min. 5 times 2) Method Step 1 : Prepare PCB’s that passed BBT Step 2 : Dip in 200℃ PEG for 1min. Step 3 : Cool water quenching Step 4 : Repeat Stpe2-3 four times. (total 5times) Step 5 : Water rinse Step 6 : Re-BBT (Bare Board Test) Re - Bare Board Tester Test Flow 3) Result - No Open&Short After Hot Oil Dip Laser Via after Hot Oil Dip * Used Oil : Poly Ethylene Glycol (PEG) 8 13 9

TECHNOLOGY ROADMAP of DAEDUCK Categories: a.Normal product; b.Build up product with microvia; c.Substrate for package