Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/ Semiconductor Device Modeling and Characterization EE5342, Lecture 21 -Sp 2002 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/ L21 02Apr02

Fully biased n-MOS capacitor VG Channel if VG > VT VS VD EOx,x> 0 n+ e- e- e- e- e- e- n+ p-substrate Vsub=VB Depl Reg Acceptors y L21 02Apr02 L

Flat band with oxide charge (approx. scale) SiO2 p-Si +<--Vox-->- q(Vox) Ec,Ox q(ffp-cox) q(fm-cox) Ex Eg,ox~8eV EFm Ec EFi EFp q(VFB) Ev VFB= VG-VB, when Si bands are flat Ev L21 02Apr02

MOS energy bands at Si surface for n-channel Fig 8.10** L21 02Apr02

Fully biased n- channel VT calc L21 02Apr02

Q’d,max and xd,max for biased MOS capacitor Fig 8.11** |Q’d,max|/q (cm-2) xd,max (microns) L21 02Apr02

n-channel VT for VC = VB = 0 Fig 10.20* L21 02Apr02

Flat-band parameters for p-channel (n-subst) L21 02Apr02

Fully biased p- channel VT calc L21 02Apr02

p-channel VT for VC = VB = 0 Fig 10.21* L21 02Apr02

Differential charges for low and high freq From Fig 10.27* L21 02Apr02

Ideal low-freq C-V relationship Fig 10.25* L21 02Apr02

Comparison of low and high freq C-V Fig 10.28* L21 02Apr02

Effect of Q’ss on the C-V relationship Fig 10.29* L21 02Apr02

Conductance of inverted channel Q’n = - C’Ox(VGC-VT) n’s = C’Ox(VGC-VT)/q, (# inv elect/cm2) The conductivity sn = (n’s/t) q mn G = sn(Wt/L) = n’s q mn (W/L) = 1/R, so I = V/R = dV/dR, dR = dL/(n’sqmnW) L21 02Apr02

Basic I-V relation for MOS channel L21 02Apr02

n-channel enhancement MOSFET in ohmic region 0< VT< VG Channel VS = 0 0< VD< VDS,sat EOx,x> 0 n+ e-e- e- e- e- n+ Depl Reg p-substrate Acceptors VB < 0 L21 02Apr02

Conductance of inverted channel Q’n = - C’Ox(VGC-VT) n’s = C’Ox(VGC-VT)/q, (# inv elect/cm2) The conductivity sn = (n’s/t) q mn G = sn(Wt/L) = n’s q mn (W/L) = 1/R, so I = V/R = dV/dR, dR = dL/(n’sqmnW) L21 02Apr02

I-V relation for n-MOS (ohmic reg) ID non-physical ID,sat saturated VDS,sat VDS L21 02Apr02

Universal drain characteristic ID VGS=VT+3V 9ID1 ohmic saturated, VDS>VGS-VT VGS=VT+2V 4ID1 VGS=VT+1V ID1 VDS L21 02Apr02

Characterizing the n-ch MOSFET VD ID D G S B VT VGS L21 02Apr02

Low field ohmic characteristics L21 02Apr02

MOSFET circuit parameters L21 02Apr02

MOSFET circuit parameters (cont) L21 02Apr02

Substrate bias effect on VT (body-effect) L21 02Apr02

Body effect data Fig 9.9** L21 02Apr02

References *Semiconductor Physics and Devices, by Donald A. Neamen, Irwin, Chicago, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986 L21 02Apr02