Welcome to DVCon China! Jinnan Huang General Chair Synopsys, Inc.

Conference Sponsor www.accellera.org Accellera Global Sponsors

Introducing the Steering Committee General Chair Jinnan Huang Synopsys, Inc. Vice Chair/Technical Program Committee Chair Xiangang Zheng Qualcomm, Inc. Tutorial Chair Samuel Zhang NVIDIA Corp. Promotion Committee Member Kang He IC Cafe Website Committee Chair Marvin Liu AMD College Committee Chair Lingli Wang Fudan University DVCon US Representative Dennis Brophy Mentor, A Siemens Business Accellera Representative Yatin Trivedi Aricent, Inc. Finance Chair Lynn Garibaldi Accellera

Conference Management Meet the on-site staff that is here to assist you throughout the conference! Robin Albright Conference Management MP Associates, Inc. Lee Wood Conference Management MP Associates, Inc. In partnership with:

DVCon has gone INTERNATIONAL!

Mobile App Review the program and save sessions to your personalized conference schedule using the free DVCon China 2018 mobile app! Available for download today!

Samuel Zhang Tutorial Chair

Tutorials Tutorial 1: Portable Test and Stimulus: The Next Level of Verification Productivity is Here 10:45 – 12:45 Ballroom A Tutorial 2: Leveraging Virtual Prototypes from Concept to Silicon 10:45 – 12:45 Ballroom B Tutorial 3: How to Stay Out of the News with ISO26262-Compliant Verification 13:00 – 14:30 Ballroom A Tutorial 4: Synopsys FPGA Platform – Enabling Significant Productivity Gains in Design, Verification and Debug of FPGA-based Designs 13:00 – 14:30 Ballroom B

Short Workshops Short Workshop 1: What Makes a Good Code Coverage Tool for HLS? 10:45 – 11:15 Room 2A Short Workshop 2: The Big Data Revolution Beautiful Servant or Dangerous Monster? 11:30 – 12:00 Room 2A Short Workshop 3: Using Mutation Coverage For Advanced Bug Hunting with Formal 13:00 – 13:30 Room 2A Short Workshop 4: Smart Verification: New Approach for FPGA Prototyping - Fast and Easy 13:45 – 14:15 Room 2A

Xiangang Zheng Vice Chair/Technical Program Committee Chair

TPC Committee Yong Chen Advanced Micro Devices, Inc. William Chen   William Chen Chen-Huei Malathi Chikkanna Broadcom Limited Leo Fang Synopsys, Inc. David Fincher Weifeng He Intel Corp. Dingwu He Qualcomm, Inc. Vincent Huang Jinnan Huang Gaurav Jalan Aricent Inc.   Ajeetha Kumari CVC Pvt., Ltd. Eric Liang NVIDIA Corp. Jeffery Liao Spreadtrum Peiyu Liu Qualcomm, Inc. Hongliang Liu Advanced Micro Devices, Inc. Bin Liu Intel Corp. Huiyan Liu James Liu HiSilicon Libo Meng Qinshu Qu Altran Group   Pankaj Singh Infineon Technologies Jun Tao Fudan Univ. Darko Tomusilovic Vtool Ltd. Srinivasan Venkataramanan CVC Pvt, Ltv. Alex Wan NXP Semiconductors Justin Wang Media Tek, Inc. Yang Wang Intel Corp. Lin Wang Roman Wang Advanced Micro Devices, Inc. Ricky Wang Cadence Design Systems, Inc.   Joe Xie NVIDIA Corp. Fan Yang Fudan Univ. Fuzhen Yu Intel Mobile Communication Xian Ltd. David Zhang Landy Zhang DJI Samuel Zhang Xiuqin Zhang Xi’an UnilC Semiconductors Xiangang Zheng Qualcomm, Inc.

DVCon China Highlights One Full Day of Design & Verification & Expo! 3 Industry Keynotes 4 tutorials moderated by user companies, tool providers and training partners 4 Short Workshops 4 technical paper presentations Poster session hosting 14 posters 15 exhibitors: Training partners, EDA design tool and IP service providers Reception Best Paper & Best Poster Vote and Award

Best Paper & Best Poster Awards YOU BE THE JUDGE! Attendees select the outstanding papers and posters. Voting will close at 17:30 Presentation of Award Recipients will be right before the evening keynote in Ballroom AB. https://www.surveymonkey.com/r/CCWQ5CC

Industry’s Next Challenge: The Petacycle Challenge Morning Keynote Industry’s Next Challenge: The Petacycle Challenge Christopher Tice Vice president of Verification Continuum Solutions in the Verification Group Thank you to our Sponsor:

Smarter Verification – Beyond Brute Force Morning Keynote Smarter Verification – Beyond Brute Force Michał Siwiński Vice President of Product Management and Operations for the System & Verification Group at Cadence Design Systems Thank you to our Sponsor:

The Next Big Thing in Design Driving the Next Big Wave in Verification Evening Keynote The Next Big Thing in Design Driving the Next Big Wave in Verification Harry Foster Chief Verification Scientist for the Design Verification Technology Division of Mentor, A Siemens Business Thank you to our Sponsor:

Special Thanks to our Sponsors KEYNOTES TUTORIALS SHORT WORKSHOPS REGISTRATION NOTEBOOK MEDIA PARTNERS

Welcome Exhibitors

Expo Hours Wednesday, April 18: 10:00 to 19:30 Visit DVCon China’s many interesting exhibitors located in the hall to network with colleagues, collaborate with industry leaders, and hold one on one discussions!

Looking Forward to Meet You in 2019 Enjoy DVCon China 2018! & Looking Forward to Meet You in 2019