Information Storage and Spintronics 09

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Presentation transcript:

Information Storage and Spintronics 09 Atsufumi Hirohata Department of Electronic Engineering 15:00 Monday, 29/October/2018 (J/Q 004)

Quick Review over the Last Lecture Shingled write recording : * Bit patterned media (BPM) : ** Conventional recording Discrete tracks : *** Nano-holes Nano-holes Tracks Conventional BPM Discrete tracks for BPM * S. Matsuo, H. Uwazumi and N. Hara, Fujidenki Gihou 85, 316 (2012); ** http://news.cnet.com/2300-1008_3-6108692.html; *** http://www.tdk.co.jp/

09 Flash Memory NOR flash NAND flash TSV Multiple value SONOS

Performance Gap between HDD and DRAM * http://www.theregister.co.uk/2013/06/25/wd_shingles_hamr_roadmap/ 4

Flash Memory In 1980, Fujio Masuoka invented a NOR-type flash memory : 1 byte high-speed read-out Low writing speed Difficult to integrate * http://rikunabi-next.yahoo.co.jp/tech/docs/ct_s03600.jsp?p=000500; ** http://www.wikipedia.org/ 5

NOR-Flash Writing and Erasing Operation Writing operation : Erasing operation : Positive potential voltage Negative potential voltage Control gate Insulating layer Floating gate Drain Source Open drain Ground Positive Positive * http://www.tdk.co.jp/techmag/knowledge/200705/index2.htm 6

NAND Flash Memory In 1986, Fujio Masuoka invented a NAND-type flash memory : No 1 byte high-speed read-out High writing speed Ideal for integration Flash erase for a unit block ( 1 ~ 10 kbyte ) only ! * http://www.wikipedia.org/ 7

NAND-Flash Writing and Erasing Operation Writing operation : Erasing operation : Positive potential voltage Ground Control gate Insulating layer Floating gate Drain Source Ground Ground Positive Positive Ground Positive * http://www.tdk.co.jp/techmag/knowledge/200705/index2.htm 8

Reading Operation “0” state : “1” state : * http://www.tdk.co.jp/techjournal_e/vol01_ssd/contents05.htm 9

Cells, Pages and Blocks Flash memory blocks : * http://www.tdk.co.jp/techjournal_e/vol01_ssd/contents06.htm 10

Flash Memory Integration NOR or NAND ? : * http://www.tdk.co.jp/techjournal_e/vol01_ssd/contents04.htm 11

Solid State Drive with Flash Memory Solid state drive (SSD) started to replace HDD : pureSi introduced 2.5” 1-TB SDD in 2009 : Data transfer speed at 300 MB/s Slow write speed For example, a system with a units of 2kB for read / out and 256 kB for erase : in order to write 1 bit, the worst case scenario is 128 times read-out 1 time flash erase 128 times re-write * http://www.tdk.co.jp/techjournal_e/vol01_ssd/contents02.htm 12

HDD vs Flash Memory Demand for flash memories : Price of flash memories : * http://www.manifest-tech.com/ce_products/flash_revolution.htm 13

Flash Memory Development Intel flash memories : 130 nm (128 MB) in 2003 90 nm (512 MB) in 2005 50 nm (1 GB) in 2007 34 nm (4 GB) in 2009 25 nm (8GB) : http://www.pcper.com/reviews/Storage/Inside-Look-Intel-and-Micron-25nm-Flash-Memory-Production/Die-Shrinks-and-You 14

For Higher Recording Density ... Through Silicon Vias (TSV) : Stacked flash : Toshiba also demonstrated 16 GB flash. Samsung demonstrated 16 GB flash. * http://www.semiconductorjapan.net/serial/lesson/13.html; ** http://www.intechopen.com/books/advances-in-solid-state-circuit-technologies/dimension-increase-in-metal-oxide-semiconductor-memories-and-transistors 15

Recent Flash Memory 32 1-TB flash modules : V-NAND architecture : 16 layers of flash memories to achieve 512Gb * https://news.samsung.com/global/samsung-electronics-begins-mass-production-of-industrys-largest-capacity-ssd-30-72tb-for-next-generation-enterprise-systems 16

Latest Flash Memory Grade 3 : -40ºC ~ 85ºC Grade 2 : -40ºC ~ 105ºC compatible with 64 layers * https://car.watch.impress.co.jp/docs/news/1148730.html 17

Bit Cost vs Recording Capacity Simple memory stack and BiCS memory : Bit cost [arb. unit] Layers Simple memory stack Memory capacity [bit] BiCS flash memory * H. Aochi, R. Katsumata and Y. Fukuzumi, Toshiba Review 66(9), 16 (2011). 18

Bit Cost Scalable (BiCS) BiCS memory design : Bit line Upper selection gate Control gate Lower selection gate Source line String * H. Aochi, R. Katsumata and Y. Fukuzumi, Toshiba Review 66(9), 16 (2011). 19

Multiple-Valued Flash Memory Multiple electrons can be stored in the floating gate : Conventional cells Multiple-valued cells “1” “11” “10” Memory cell read-out threshold Memory cell read-out threshold “01” “0” “00” Cell distributions Cell distributions * http://www.semiconductorjapan.net/serial/lesson/13.html 20

SONOS Si / SiO2 / SiN / SiO2 / poly-Si (SONOS) : By replacing the poly-Si floating gate with SiN, i.e., Si9N10, unbound dangling bonds can trap more electrons. * http://www.eetimes.com/document.asp?doc_id=1279116 21

3-Dimensional Integration with Higher Density Max Shulaker (MIT) proposed monolithic architecture : * * https://sense.mit.edu/people/max-shulaker 22

Integration of Functionality 3D monolithic can be advantageous over TSV etc. : * * https://sense.mit.edu/people/max-shulaker 23

Flash Memory vs DRAM Comparisons between flash memory and DRAM : * Tunnel barrier Floating gate Principles Transistor Transistor Condenser Electron charges are stored in the On On Electrons are stored at the floating gate. condenser. Writing operation Leakage from the condenser. Electrons cannot tunnel through the barriers. Data volatility * http://pc.nikkeibp.co.jp/article/NPC/20061228/257976/ 24