Simple Circuit-Based SAT Solver Alan Mishchenko

Outline Motivation Implementation Experiment

Motivation for a New SAT Solver Runtime of several applications is dominated by SAT SAT sweeping Sequential SAT sweeping (register/signal correspondence) Accumulation of structural choices Computing don’t-cares in a window The problems solved by SAT solver in these applications have the following in common Incremental (each problem has +/- 10 AIG nodes, compared to the previous problem solved) Relatively easy (less than 100 conflicts) Numerous (10K-100K problems)

Motivation for a Circuit-Based Solver CNF is an intermediate step MiniSat uses more memory to represent CNF, which is not needed for easy problems Circuit is a helpful data-structure It is the primary problem representation It is more compact than CNF It has useful information for the solver Some of these observations are well known in the ATPG community

Implementation High-level view of the solver Solver data structures Recursive procedure Additional implementation details

High-Level View of the Solver Input: Multi-output combinational AIG Output: SAT solving status for each output SAT: satisfiable (provide a counter-example) UNSAT: unsatisfiable UNDECIDED: the solver’s resource limit is reached status_array SatSolver( Sat_Solver * p, Aig_Man * pMan ) { for each primary output Out of pMan { if ( Out is driven by a constant ) status = DeriveStatusSimple( Out ); else { PQueueAssume( p, DrivingNode( Out ) ); status = SatSolve_rec( p ); } AddStatusToArray( status_array, status ); return status_array;

Data Structures Constraint data-base (AIG) Propagation queue (PQueue) Each node is labeled with two binary flags Assign: Set to 1 iff the node is assigned a value Value: Set to 1 iff the node’s current value is 1 Propagation queue (PQueue) The sequence of assignments made Justification queue (JQueue) The set of nodes to be justified The output is assigned 0 while inputs are unassigned Node vector containing a SAT assignment Used to PI nodes participating in a counter-example after a satisfiable SAT run

Recursive SAT Procedure status SatSolve_rec( Sat_Solver * p ) { if ( PQueuePropagate( p ) == UNSAT ) return UNSAT; if ( JQueueIsEmpty( p ) ) return SAT; Aig_Node * Var = JQueueSelectVariable( p ); int mark = PQueueMarkCurrentPosition( p ); PQueueAssume( p, !Var ); if ( SatSolve_rec( p ) == SAT ) return SAT; PQueueCancelUntil( mark ); PQueueAssume( p, Var ); return UNSAT; }

Implementation Details JQueue is not implemented as an array (as opposed to the traditional implementation as a linked list) Before each decision JQueue is duplicated and stored away Non-chronological backtracking can be added Need two additional data-structures For each assigned node, save its level For each assigned node, save its reason (NULL, if decision) Recording learned clauses can be added A learned clause is derived after each conflict Constraint propagation on learned clauses can be added Watched literal scheme can be used It is important to keep only learned clauses in the data-base this allows the solver to derive incomplete assignments

Experimental Results (SAT)

Experimental Results (CEC) CEC results for 8 hard industrial instances. Runtime in minutes on Intel Q9450 @ 2.66 Ghz. Time1 is “cec” in ABC809xx. Time2 is “&cec” in abc90329. Timeout is 1 hour. Less than 100 Mb of RAM was used in these experiments.

Why MiniSAT Is Slower? Requires multiple intermediate steps Window  AIG  CNF  Solving Instead of Window  Solving Uses too much memory Solver + CNF = 140 bytes / AIG node Instead of 8-16 bytes / AIG node Decision heuristics Are not aware of the circuit structure Instead of Using circuit information