Last time Large signal DC analysis Current mirror example Example on how to use large signal analysis to obtain Constraints for saturation operation Vo range Design strategies

Today’s focus Small signal DC analysis Goal: Mainly use CS as example Analysis is at a given Q point Focus is on ro, rin, Av Goal: How these depend on design parameters How to reduce DOF of design parameters More design strategies

PMOS CM NMOS CM Chapter 3 Figure 04 Chapter 3 Figure 01

CS: N-input, P-load Chapter 3 Figure 04

Common drain, i.e., source follower N-input, P-load Chapter 3 Figure 04 Chapter 3 Figure 06

VDD Large signal: Want all T’s in saturation From ID1=IQ, estimate VG1Q by ignoring l-effect For M1 in sat, Vds1 > Veff1 From ID2=IQ, estimate VGS2Q Need VG2Q > VGS2Q+Veff1 For M2 in sat, Vds2 > Veff2 So, need Vo> VG2Q-Vt2 IQ M2 M1 Cascode

Small signal Assume all T’s in saturation Draw small signal circuit Compute small signal parameters Rin Ro Ai Av …

Source follower, or common drain amplifier. Read book for analysis. Av is less than but close to 1. Ro is small, so can drive resistive load. Commonly used as buffer

VDD Large signal: same as cascode Small signal: Ro same as cascode Rin = rds1||rincg rincg: be careful Av: Ai: IQ M2 M1 Common Gate amp

Super source follower Vbp VDD VDAC vo IQ vin VSSF Vbn M1