2PAD’s Beamforming Software

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Presentation transcript:

2PAD’s Beamforming Software Design and Implementation Aziz AhmedSaid (UoM) Other Contributors Stef Salvini, Fred Dulwich, Ben Mort (OERC), Chris Shenton (UoM) Presented by Chris Shenton (UoM)

Objectives To design and implement a real-time 2 polarisation beamformer on 2PAD’s processing engine; To design and implement the data transfer, storage and display software to run on the back end host computer; To test, verify and evaluate 2PAD’s performance.

System Overview LNA Multi Digital & Channel Signal Signal ADC Condition Multi Channel ADC Digital Signal Processor

Our task: LNA Multi Digital & Channel Signal Signal ADC Processor Condition Multi Channel ADC Digital Signal Processor

2PAD’s Processing Engine

Software Design Flow

Software Kernel and Libraries More efficient: Simple design, less latency, optimised for speed; Better usage of resources: Memory, thread units; Full control of the chip; Full access to all the software which enables further customisation/tuning for every application;

Typical Beamforming Scheme

Our Beamforming Scheme

Logical Mapping on the Cyclops System

Physical Mapping

Data Path

Data Flow

Data Streams Structure

The Beamformer We have a fully working beamformer: 2 Polarisations; 1,2,4 or 8 beams (more is possible); NumberOfBeams X NumberOfFreqBands = K (K represents the total bandwidth per polarisation) K ~= 300 for 1 beam and goes up to 800 for 8 beams (these are just initial estimations, based on simulations); For example for 8 beams: 100MHz per beam.

Simulation Setup

Simulation Results 2 Polarisations, 2 Frames, 8 Beams per frame, 64 Frequency bands per beam.

Simulation Results (Zoom)

Summary We have designed and implemented a customised and highly optimised software kernel and libraries for the Cyclops. We have designed, implemented and fully tested a multi-beam, 2 polarisation beamformer for the Cyclops system. We have shown good correlation between theoretical simulation and simulated hardware.

Future work Create the Host computer software; Port the beamformer to the real hardware; Perform real test, verification and evaluation of the beamformer. Perform code and datapath profiling to fully understand the power vs performance characteristics of the system.