Hardware/Software Co-Design Nick Wieder

Heterogeneous Architecture Why to Use? Decreased total operation time Energy / Power vs. Cost Why Not to use? Other operation causes bottleneck Cost / Improvement

In general don’t execute instructions Accelerators In general don’t execute instructions May be ASICs or FPGAs Can be on Chip

Accelerators Design PC-Based Custom PCB Single Chip Commercial Board plugged into a PC-Buss Normally used for development Custom PCB More up front cost / Lower power Single Chip Commercial Includes FPGA and CPU on Single Chip Custom IC

CPU+ Accelerator Communicate using shared memory Requires Synchronization --Communicate using Shared memory for large amounts of data --Require Synchronization mechanisms

Single Vs Multi Thread Total Processing Time Single Multi

Performance Analysis Single Threaded Multi Threaded Performance may be increased Multi Threaded Performance Should be increased More calls to Accelerator = Greater increase Should be increased depending on delay to xfer data between ACC and CPU

Questions ? None = Good!