The TMS320C6x Family of DSPs

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The TMS320C6x Family of DSPs Lecture 5 The TMS320C6x Family of DSPs

ACOE343 - Real-Time Embedded Processor Systems - Frederick University Features High-Performance Fixed-Point Digital Signal Processor (TMS320C6413/C6410) − TMS320C6413 2-ns Instruction Cycle Time 500-MHz Clock Rate 4000 MIPS − TMS320C6410 2.5-ns Instruction Cycle Time 400-MHz Clock Rate 3200 MIPS Eight 32-Bit Instructions/Cycle ACOE343 - Real-Time Embedded Processor Systems - Frederick University

ACOE343 - Real-Time Embedded Processor Systems - Frederick University Features Eight Highly Independent Functional Units Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle Two Multipliers Support Four 16 x 16-Bit Multiplies (32-Bit Results) per Clock Cycle or Eight 8 x 8-Bit Multiplies (16-Bit Results) per Clock Cycle Load-Store Architecture 64 32-Bit General-Purpose Registers Instruction Packing Reduces Code Size All Instructions Conditional ACOE343 - Real-Time Embedded Processor Systems - Frederick University

ACOE343 - Real-Time Embedded Processor Systems - Frederick University Features L1/L2 Memory Architecture − 128K-Bit (16K-Byte) L1P Program Cache (Direct Mapped) − 128K-Bit (16K-Byte) L1D Data Cache (2-Way Set-Associative) − 2M-Bit (256K-Byte) L2 Unified Mapped RAM/Cache [C6413] − 1M-Bit (128K-Byte) L2 Unified Mapped RAM/Cache [C6410] Endianess: Little Endian, Big Endian − 512M-Byte Total Addressable External Memory Space Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels) 16 prioritized interrupts ACOE343 - Real-Time Embedded Processor Systems - Frederick University

ACOE343 - Real-Time Embedded Processor Systems - Frederick University Block Diagram ACOE343 - Real-Time Embedded Processor Systems - Frederick University

ACOE343 - Real-Time Embedded Processor Systems - Frederick University Cache ACOE343 - Real-Time Embedded Processor Systems - Frederick University

ACOE343 - Real-Time Embedded Processor Systems - Frederick University Timers Two 32-bit timers used as timers/event/counters/interrupt sources Configuring a timer requires four basic steps: If the timer is not currently in the hold state, place the timer in hold (HLD = 0). Note that after device reset, the timer is already in the hold state Write the desired value to the timer period register (PRD). Write the desired value to the timer control register (CTL). Do not change the GO and HLD bits in CTL. Start the timer by setting the GO and HLD bits in CTL to 1. ACOE343 - Real-Time Embedded Processor Systems - Frederick University

ACOE343 - Real-Time Embedded Processor Systems - Frederick University Interrupts 16 interrupt sources 2 timer interrupts 4 external interrupts 4 McBSP interrupts 4 DMA interrupts ACOE343 - Real-Time Embedded Processor Systems - Frederick University

Interrupt control registers CSR: control status register IER: Interrupt enable register IFR: interrupt flag register ISR: interrupt set register ICR: interrupt clear register ISTP: interrupt service table pointer IRP: interrupt return pointer NRP: NMI return pointer ACOE343 - Real-Time Embedded Processor Systems - Frederick University

ACOE343 - Real-Time Embedded Processor Systems - Frederick University Interrupt Priority ACOE343 - Real-Time Embedded Processor Systems - Frederick University

Interrupt Service Table (single fetch packet) ACOE343 - Real-Time Embedded Processor Systems - Frederick University

Interrupt Service Table (branch to additional code) ACOE343 - Real-Time Embedded Processor Systems - Frederick University

ACOE343 - Real-Time Embedded Processor Systems - Frederick University DMA ACOE343 - Real-Time Embedded Processor Systems - Frederick University