Gigabit Ethernet Design ECE 4006C – Spring 2003

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Presentation transcript:

Gigabit Ethernet Design ECE 4006C – Spring 2003 Group 7 Presentation #2 Jed Eaton January 23rd, 2003

Progress Report First Lab Session: Improved Gantt chart. Decipher Rx layout. Familiarized with lab tools. Important safety tips. Improved Gantt chart. Includes 2 runs and optical link budget. Research VCSEL and PD. Built and Tested Receiver Board Reasonable eye results Presentation #2 - Jan 23, 2003

First Week in the Lab Learned how to operate the measurement gear: Conducted a loop feedback test. Safety tip – look out for the exposed end of the fiber optics in the lab. Finished soldering and testing Rx PCB Got a first glimpse of the eyes. Presentation #2 - Jan 23, 2003

Notes: J2 J3 U2 Q2 U1 Q1 J1 C7 C8 R2 R3 C6 C5 C3 C4 C2 R1 C1 C9 Q1 Q3 49.9 C7 C8 C5 R2 R3 C6 C5 Q2 U2 PIN 1 C3 C4 Q2 Notes: C2 U1 PIN 1 R1 *Connector Q3 and capacitor C9 are not needed on the PCB because pin 11 is shorted to pin 14 on the MAX3264 IC. *All connectors face outward from the center of the board. Q1 C1 J1

Eye Results D21.5 K28.5 PRBS7 K28.7 Presentation #2 - Jan 23, 2003

Revised Gantt Chart Presentation #2 - Jan 23, 2003

Next Week… Optical Link and Power Budgeting Contact Vendor Photo detector/VCSEL determination Order Parts……. Presentation #2 - Jan 23, 2003

Dan Quayle Quote of the Day.. “It’s wonderful to be here in the great state of Chicago..” Presentation #2 - Jan 23, 2003