Introduction to Computing Machinery Lecture 1 Introduction to Computing Machinery

Layers of a Computer System

Computer Hardware Motherboard

A recipe calls for 3 egg whites, but it doesn’t describe how to separate the whites from the yolks. These details are omitted from the recipe itself but can be found elsewhere. How to separate an egg is abstracted from the recipe.

Early History of Computing Machines 1600 1700 1800 1900 2000 Blaise Pascal Pascaline Gottfried Leibniz Stepped Reckoner Joseph Marie Jacquard Programmable Loom Charles Babbage Difference Engine Augusta Ada Countess of Lovelace Programming the Analytical Engine Herman Hollerith Electronic Tabulating System design of ACE Turing Test Alan Turing Computable Number Paper Colossus

addr label instruction addr machine code . 0 LDA A 00000 00000100 1 ADD B 00001 01000101 2 STO C 00010 00100110 3 HLT 00011 11111111 4 A 24 00100 00011000 5 B 30 00101 00011110 6 C 0 00110 00000000

C = A + B

Networks and the Internet

The OSI Model The Open System Interconnection (OSI) model defines a networking framework to implement protocols in seven layers. There is really nothing to the OSI model. In fact, it's not even tangible. The OSI model doesn't perform any functions in the networking process. It is a conceptual framework so we can better understand complex interactions that are happening. 1. Physical Layer - carries the bit stream, electrical impulses (fiber optics) or radio signals 2. Data Link Layer - data packets, encoded and decoded into bits, establishes transmission protocols 3. Network Layer - switching and routing, provides addressing, error handling, and packet sequencing 4. Transport Layer - transfer of between hosts, checking for complete/correct data transfer 5. Session Layer - opens, manages, and closes connections between applications 6. Presentation Layer - also called the syntax layer, deals with the abstraction (hiding) of specific data formats 7. Application Layer - deals with end-user processes, authentication and privacy, enables FTP, eMail, etc..

The Von-Neumann Architecture The concept of a stored program was part of the design of the Analytical Engine and well understood by Charles Babbage and Augusta Ada more than 150 years ago. For some reason, this concept was temporarily lost or forgotten by the middle of the 20th century. Early electronic computers, such as the ENIAC, kept the logic and arithmetic instructions separate from the data. Some early computers had to be rewired in order to change their programs. The interpretation of a word in memory as either an instruction or data is determined by its location in memory rather than its pattern of ones and zeros. The content of memory has more than one possible interpretation. For example, the bit pattern, 01000000010010010000111111011010 can represent the integer 1,078,530,010 or an instruction to JUMP to another location (address) in memory, or it could represent an approximation for the numeric value of p.

IEEE Representation of p

Designing the Very Simple Computer VSC Instruction operations code address 3-bits limits the number of instructions to 23 = 8 5-bit limits the number of words to 25 = 32 8-bit instructions will all be direct addressing mode data type will be integer, twos'-complement operations will correspond to Post-Turing language with only 8 instructions, the VSC is the "Ultimate RISC" Computer

The Very Simple Computer

Design of a Adder Circuit

Continued Abstraction of Adder Circuit Details

Adder's Placement in the Arithmetic Logic Unit (ALU)

Very Simple Computer

High-Level Programming Levels of Programming Languages High-Level Programming Language Assembly Language Machine Language address instruction LDA X ADD Y STO Z HLT X 10 Y 12 Z 00000 00001 00010 00011 00100 00101 00110 00000100 01000101 00100110 11100000 00001010 00001100 00000000 Z = X + Y data instructions

Running the VSC

Running the VSC

Running the VSC

Running the VSC

Running the VSC

Running the VSC

Running the VSC

The Instruction Set LDA addr - load the accumulator with the value from memory at address addr STA addr - store the value in the accumulator into memory at address addr. ADD addr - add value in memory at address addr to ACC and store in LAT1. CMP addr - take the 1's complement of the value in memory at address addr BNN addr - the branch-not-negative statement will set PC = addr if the value in the accumulator is not negative. SHL addr - shift value in memory at address addr one bit to the left. SHR addr - shift value in memory at address addr one bit to the right (arithmetic). HLT - this instruction terminates the fetch-execute cycle.

The Fetch/Execute Cycle get the address of the next instruction load the instruction register with the next instruction get the address in the current instruction increment to program counter move the value in the ALU ACC into LAT2 move the data referred to by the instruction into LAT1 execute the instruction

Programming the VSC addr label instruction addr machine code . 0 LDA A 00000 00000100 1 ADD B 00001 01000101 2 STO C 00010 00100110 3 HLT 00011 11111111 4 A 24 00100 00011000 5 B 30 00101 00011110 6 C 0 00110 00000000

ACM/IEEE Guidelines for Computer Science Undergraduate Curriculum Core/Elective Courses Knowledge Areas CSC 101 CSC 345 – CSC 445 CSC 405 MAT 135 – MAT 150 – CSC 300 MAT 250 – CSC 300 CSC 275 – CSC 515 – CSC 575 CSC 530 CIS 407 – TSM 351 CIS 407 CSC 370 – CSC 375 – CSC 445 CSC 410 – CSC 425 CSC 410 CSC 425 CSC 410 – CSC 445 CCS 415 CSC 145 – CSC 235 – CSC 325 CSC 325 – CSC 430 CSC 540 AL - Algorithms and Complexity AR - Architecture and Organization CN - Computational Science DS - Discrete Structures GV - Graphics and Visualization HCI - Human-Computer Interaction IAS - Information Assurance and Security IM - Information Management IS - Intelligent Systems NC - Networking and Communications OS - Operating Systems PBD - Platform-based Development PD - Parallel and Distributed Computing PL - Programming Languages SDF - Software Development Fundamentals SE - Software Engineering SF - Systems Fundamentals SP - Social Issues and Professional Practice