8-Pack LLRF Status & Schedule Update date Multibunch (ATF) results) Chip status Delete costs Get better drawing of cavity More details of cavity BPM scheme Steve Smith July 23, 2002
LLRF Generation
RF Generator Chassis
RF Generator Chassis
RF Processing Channel RF Generator Scope / DVM Trip (x8) Cal RF (x8) Digital I/O Trip RF Trip (x8) Octal Down-converter IQA Digitizer SIS Mux Address Enable Reset Cal RF (x8) IF (x8) I&Q (x8) LO1 RMS Peak Hold ADC VMIC 3122 IF Mon Thresh Mon LO2 Ppeak Scope / DVM
Downconverter Chassis
Downconverter Chassis
Downconverter Chassis
LLRF VME Crate #1 Layout (FAST) CPU XYCOM VMIC2534 VMIC3122 VMIC3122 VMIC4132 VMIC4132 VMIC4132 VMIC4132 VMIC4132 BLANK BLANK BLANK Special Special Special BLANK BLANK BLANK BLANK BK Trig RF Monitor VME Crate #2-3 Layout (SLOW) CPU SCANNER BLANK BLANK BLANK BLANK BLANK BLANK BLANK BLANK BLANK BLANK BLANK BLANK BLANK BLANK BLANK BLANK BLANK BLANK BLANK CPU BLANK IQA IQA IQA IQA SIS SIS SIS SIS SIS SIS SIS SIS LO PLL RF PLL Special Special Joeger Joeger Joeger
Schedule
LLRF Generator Schedule
LLRF Monitor Schedule
Status & Issues First 2 downconverter chassis are ready remaining ones soon complete. RF generator chassis assembled Needs mixer I&Q driver boards And switch driver Still designing stuff Coupling, attenuation Panels Control algorithms We are ~ 4 weeks late Constrained by manpower, lab priorities.