A Data-Driven Statistical Approach to Analyzing Process Variation in 65nm SOI Technology ISQED 2007, San Jose, Mar 28, 2007 Choongyeun Cho1, Daeik Kim1, Jonghae Kim1, Jean-Olivier Plouchart1, Daihyun Lim2, Sangyeun Cho3, and Robert Trzcinski1 1IBM, 2MIT, 3U. of Pittsburgh

Outline Introduction: Experiments: Conclusion Motivation of this work Constrained Principal Component Analysis Proposed method Experiments: Using 65nm SOI technology Conclusion Applications, future work Contributions

Motivation Process variation (PV) limits performance/yield of an IC. PV is hard to model or predict. Many factors of different nature contribute to PV. Physical modeling is intractable. Four ranges of PV: Within-die Die-to-Die Wafer-to-Wafer Lot-to-Lot

Motivation We present an efficient method to decompose PV into D2D and W2W components. Use existing manufacturing “in-line” data only. No model! Within-die Die-to-Die Wafer-to-Wafer Lot-to-Lot

What is In-line Data? In this work, “in-line” data refers to: Electrical measurements in manufacturing line using a parametric tester for various purposes: fault diagnosis, device dc characterization, and model-hardware correlation (MHC). Thus, available very early in the manufacturing process. Key PV parameters (VT, LPOLY, TOX, etc) are mostly embedded in in-line data yet in an obscure manner. We statistically exploit in-line data to extract D2D and W2W variations individually.

Principal Component Analysis Principal Component Analysis (PCA) rotates coordinates such that resulting vectors are: Uncorrelated, Ordered in terms of variance. Can be defined recursively: w 1 = a r g m x j v ( T ) w k = a r g m x j 1 ; ? i 8 : ¡ v ( T ) ¸ 2 w h e r x i s a n o g l v c t d - P C .

Constrained PCA Constrained PCA (CPCA): same as PCA except PC’s are constrained to a pre-defined subspace. In this work, constraint is that a PC must align with D2D or W2W variation direction. Ordinary PCA Proposed CPCA

Proposed Algorithm In-line data Can generalize for within-die and lot-to-lot variations. Implemented with <100 lines of Matlab code. Standardization Screening Find first PC for D2D variation Find first PC for W2W variation Take PC with larger variance Subtract this PC space from original data

Case I: 65nm SOI Tech 65nm SOI CMOS data (300mm wafer) 1109 in-line parameters used: 40 dies/wafer,13 wafers = 520 samples. The run for whole data was <1min on an ordinary PC. Type FET RO SRAM Capacitance Total # Param’s 759 83 159 108 1109

Cumulative Variance explained Case I: 65nm SOI Tech PCA 0.8 0.7 Constrained PCA 0.6 CPC Index Type Variance explained Cumulative Variance explained 1 Die 31.0% 2 Wafer 25.2% 56.2% 3 4.5% 60.7% 4 4.2% 64.9% 5 2.4% 67.3% Cumulative variance explained 0.5 0.4 0.3 0.2 1 5 10 15 20 PC/CPC Index

Case I: 65nm SOI Tech D2D variation (1st CPC) W2W variations (Fitted with 2nd order polynomials on the 40 available samples) W2W variations (2nd,4th,5th CPC’s)

Case II: Applied to RF Circuit Bench-tested RF self-oscillation frequencies (Fosc) for static CML frequency divider. 5 10 20 40 25 30 35 45 Wafer Site Fosc Fosc Die index Wafer index Original

Reconstruction 1 Fosc Die index Wafer index Offset 45 Fosc 35 30 25 40 5 10 20 40 25 30 35 45 Fosc Wafer Site Fosc Die index Wafer index Offset

Reconstruction 2 Fosc Die index Wafer index Offset + CPC#1 (D2D) 45 5 10 20 40 25 30 35 45 Wafer Site Fosc Fosc Die index Wafer index Offset + CPC#1 (D2D)

Offset + CPC#1 + CPC#2 (W2W) Reconstruction 3 5 10 20 40 25 30 35 45 Wafer Site Fosc Fosc Die index Wafer index Offset + CPC#1 + CPC#2 (W2W)

Offset + CPC#1 + CPC#2 + CPC#3 (D2D) Reconstruction 4 5 10 20 40 25 30 35 45 Wafer Site Fosc Fosc Die index Wafer index Offset + CPC#1 + CPC#2 + CPC#3 (D2D)

Offset + CPC#1 + CPC#2 + CPC#3 + CPC#4 (W2W) Reconstruction 5 5 10 20 40 25 30 35 45 Wafer Site Fosc Fosc Die index Wafer index Offset + CPC#1 + CPC#2 + CPC#3 + CPC#4 (W2W)

Reconstruction & Original PVs obtained from in-line measurement explain significant portion (66%) of PV existing in complex RF circuit. 5 10 20 40 25 30 35 45 Wafer Site Fosc Fosc Die index Wafer index

Case III: Technology Monitoring Iteration 1 (Pre-production) Dominant D2D variations obtained for three successive 65nm SOI tech iterations. Visualize how technology stabilizes. Iteration 1 (Pre-production) Iteration 2 Iteration 3

Application / Future Work Intelligent sampling: D2D variation signature may serve as a guideline to pick representative chips for sampled tests. Technology snapshot: Use D2D variation to monitor characteristic of a given lot or technology. Future work includes: Incorporate within-die and lot-to-lot variations. Statistical elaboration (Non-Gaussianity, etc).

Contributions Presented a statistical method to separate die-to-die and wafer-to-wafer variations using PCA variant: Allows visualization and analysis of systematic variations. Rapid feedback to tech development. Verified that RF circuit performance is tied to device PV’s.