Summary

Ideal DAC Essentially a digitally controlled voltage, current or charge source Example below is for unipolar DAC Ideal DAC does not introduce quantization error!

The Reconstruction Problem As long as we sample fast enough, x(n) contains all information about x(t) fs > 2·fsig,max How to reconstruct x(t) from x(n)? Ideal interpolation formula Very hard to build an analog circuit that does this…

Zero-Order Hold Reconstruction The most practical way of reconstructing the continuous time signal is to simply "hold" the discrete time values Either for full period of Ts or a fraction of Ts What does this do to the signal spectrum? We'll analyze this in two steps First look at infinitely narrow reconstruction pulses

Useful Lemmas  

Dirac Pulses xd(t) is zero between pulses Note that x(n) is undefined at these times Multiplication in time means convolution in frequency Resulting spectrum The details are given in the next slide.

Cont’d  

Spectrum Spectrum of Dirac signal contains replicas of X(f) at integer multiples of the sampling frequency

Finite Hold Pulse Consider the general case with a rectangular pulse 0 < Tp ≤ Ts xp(t) is obtained from convolving the Dirac sequence xd(t) with a rectangular unit pulse hp(t). xp(t)=xd(t)*hp(t) (the proof is given in the next slide) Spectrum follows from multiplication with Fourier transform of the pulse

Cont’d  

Envelope with Hold Pulse Tp=Ts

Envelope with Hold Pulse Tp=0.5·Ts

Example

Reconstruction Filter Also called smoothing filter Same situation as with anti-alias filter A brick wall filter would be nice Oversampling helps reduce filter order

Summary Must obey sampling theorem fs > 2·fsig,max Usually dictates anti-aliasing filter If sampling theorem is met, continuous time signal can be recovered from discrete time sequence without loss of information A zero order hold in conjunction with a smoothing filter is the most common way to reconstruct May need to add pre- or post-emphasis to cancel droop due to sinc envelope Oversampling helps reduce order of anti-aliasing and reconstruction filters

Static Specifications Maloberti, Data Converters, pp. 50-51

Static Specifications Static deviations of transfer characteristics from ideality Offset Gain error Differential Nonlinearity (DNL) Integral Nonlinearity (INL) Monotonicity Missing code Useful references Analog Devices MT-010: The Importance of Data Converter Static Specifications http://www.analog.com/en/content/0,2886,761%255F795%255F91286,00.html "Understanding Data Converters," Texas Instruments Application Report LAA013, 1995 http://focus.ti.com/lit/an/slaa013/slaa013.pdf

Offset and Gain Error Conceptually simple, but lots of (uninteresting) details in how exactly these errors should be defined General idea (neglecting staircase nature of transfer functions):

ADC Offset and Gain Error Definitions based on bottom and top endpoints of transfer characteristic Endpoints: ½ LSB before first transition and ½ LSB after last transition Offset is the deviation of bottom endpoint from its ideal location Gain error is the deviation of top endpoint from its ideal location with offset removed Both quantities are measured in LSB or as percentage of full-scale range

DAC Offset and Gain Error Same idea, except that endpoints are directly defined by analog output values at minimum and maximum digital input Also note that errors are specified along the vertical axis

Comments on Offset and Gain Errors Definitions on the previous slides are the ones typically used in industry IEEE Standard suggest somewhat more sophisticated definitions. Technically more suitable metric when the transfer characteristics are significantly non-uniform or nonlinear Generally, it is important to build a converter with very good gain/offset specifications However, since gain and offset affect all codes uniformly, these errors tend to be easy to correct E.g. using a digital pre- or post-processing operation Also, many applications are insensitive to a certain level of gain and offset errors E.g. audio signals, communication-type signals, ... More interesting aspect: linearity DNL and INL

Differential Nonlinearity (DNL) In an ideal world, all ADC codes would have equal width; all DAC output increments would have same size DNL(k) is a vector that quantifies for each code k the deviation of this width from the "average" width (step size) DNL(k) is a measure of uniformity, it does not depend on gain and offset errors Scaling and shifting a transfer characteristic does not alter its uniformity and hence DNL(k) Let's look at an example

ADC DNL Example

ADC DNL Example (cont’d) What is the average code width? ADC with perfect uniformity would divide the range between first and last transition into 6 equal pieces Hence calculate average code width (i.e. LSB size) as Now calculate DNL(k) for each code k using

Result Positive/negative DNL implies wide/narrow code, respectively DNL = -1 LSB implies missing code Impossible to have DNL < -1 LSB for an ADC But possible to have DNL > +1 LSB Can show that sum over all DNL(k) is equal to zero

A Typical ADC DNL Plot People speak about DNL often only in terms of min/max number across all codes E.g. DNL = +0.63/-0.91 LSB Might argue in some cases that any code with DNL < -0.9 LSB is essentially a missing code Why ?

Impact of Noise In essentially all moderate to high-resolution ADCs, the transition levels carry noise that is somewhat comparable to the size of an LSB Noise "smears out" DNL, can hide missing codes Especially for converters whose input referred (thermal) noise is larger than an LSB, DNL is a "fairly useless" metric

Missing Code in ADC Code 101 is missed.

DAC DNL Same idea applies Find output increments for each digital code Find increment that divides range into equal steps Calculate DNL for each code k using One difference between ADC and DAC is that DAC DNL can be less than -1 LSB How ?

Non-Monotonic DAC In a DAC, DNL < -1LSB implies non-monotonicity How about a non-monotonic ADC?

Integral Nonlinearity (INL) General idea For each "relevant point" of the transfer characteristic, quantify distance from a straight line drawn through the endpoints An alternative, less common definition uses a least square fit line as a reference Just as with DNL, the INL of a converter is by definition independent of gain and offset errors

ADC INL Example "Straight line" reference is uniform staircase between first and last transition INL for each code is Obviously INL(1) = 0 and INL(7) = 0 INL(0) is undefined

ADC INL Example (cont’d) Can show that Means that once we computed DNL, we can easily find INL using a cumulative sum operation on the DNL vector Using DNL values from last lecture, we find

Result

A Typical ADC DNL/INL Plot DNL/INL signature often reveals architectural details E.g. major transitions We'll see more examples in the context of DACs Since INL is a cumulative measure, it turns out to be less sensitive than DNL to thermal noise "smearing"

DAC INL

DAC INL Same idea applies Find ideal output values that lie on a straight line between endpoints Calculate INL for each code k using Interesting property related to DAC INL If for all codes |INL| < 0.5 LSB, it follows that all |DNL| < 1 LSB A sufficient (but not necessary) condition for monotonicity