Models of Sequential Systems Sungho Kang Yonsei University

Outline Introduction to Finite State Machines Synthesis of Finite State Machines FSMs : Definition, Notation, and Examples FSM Minimization of Completely Specified Machines Graph Algorithms for FSM Traversal Models of Sequential Systems FSTs: Strings, Runs, Reachability and Products FSM Equivalence Checking Reachability Analysis Symbolic FSM State Traversal

A Verbal FSM Specification Introduction The circuit receives a stream of bits, one per clock cycle, on input and at every clock cycle it indicates, on the three outputs Z2Z1Z0 the difference between the number of ones and the number of zeroes in the last three bits received. The difference is positive if the number of ones exceeded the number of zeroes and it is negative otherwise. The difference is represented as a 2's complement number, with Z2 the sign bit and Z0 the least significant bit. At reset, the circuit is assumed to have received an arbitrarily long string of zeroes, so that the output is -3.

Sign Bit 2’s Complement Assume -2n  i  2n. Then the 2’s complement Introduction Assume -2n  i  2n. Then the 2’s complement representation of an integer i is the binary code for the integer j = 2n - |i|, augmented by an extra bit denoting the sign of i. Examples: Sign Bit

A Sequential Counter Circuit and Its STG Introduction Latches 0,1,2, use n=2. Circuit Truth Table 000 101 001 111 011 001 010 111 110 001 111 011 101 001 100 111 STG (State Transition Graph)

Systematic FSM Design Paradigm Introduction

Synthesis of Practical FSMs Synthesis of FSMs We have learned basic methods for minimizing, encoding, checking equivalence, and synthesizing circuits for realizing completely specified FSMs Now we must learn to deal with the more practical case of incomplete specification Our goal is thus to find a least cost circuit that satisfies a partial specification

FSM Synthesis--State Encoding Synthesis of FSM K-map of State set 4 = log29 s=(s1,s2,s3,s4) Code Length Encoding vector Characteristic function of set Criteria: avoid 1s, promote adjacency

Encoding the Transition Functions FSMs Given: FSM specified as Cube Table Find code length and encoding Replace symbolic states with binary codes For each row with a 1 in the i column, add the input cube to the formula for i (s).

Encoding: Simplification: 11 (or 10) literals x s s d d l 1 2 1 2 1 1 FSM Synthesis--State Encoding FSMs Encoding: x s s d d l 1 2 1 2 1 1 1 1 1 1 1 1 1 1 1 1 Simplification: 11 (or 10) literals

Exploiting Unreachable State Don’t Cares FSMs When there are unreachable states, the encodings of these states are don’t cares These don’t cares can be used to minimize the logic of the next state and output functions 1’s in the output columns of the cube table are primary reason for “fat” logic--don’t cares minimize this effect

Encoding(2 1s) Encoding(4 1s) Conclusion: Avoid codes with 1s FSM Synthesis--State Encoding FSMs Encoding(2 1s) Encoding(4 1s) d = s ¢ s x + s s ¢ x + s s x ¢ , d = s + s ¢ s x ¢ , Conclusion: Avoid codes with 1s 1 1 2 1 2 1 2 2 1 1 2 l = s s x DC = s ¢ s ¢ ® ( 11 literals ) 1 2 1 2 d = s s x ¢ + s ¢ x + s ¢ x , d = s + x ¢ , l = s s x 1 1 2 1 2 2 1 1 2

State Sequences Output Sequences FSM State Sequences M = < I, S, , S0, O, > I : Input Alphabet O : Output Alphabet S : State Set S0 : Initial State Set  : Next State Transition Function  : Output Function State Sequences Output Sequences

Formal FSM Specification STG Cube Table Flow Table M = < I, S, , S0, O, > I={0,1}, S={S0, S1, S2}, S0={S1}, O={0,1}

State Minimization FSM Minimization Two FSMs are equivalent if their initial states are equivalent. Two states are equivalent if there is no sequence of inputs, which, applied to both machines, produces an output difference The task of replacing two or more equivalent states with a single representative state is called State Minimization

sequence of inputs to an FSM M = < I, S, , S0, O, > Strings and Runs FSM Minimization A string is a finite sequence of inputs to an FSM M = < I, S, , S0, O, > where . produces the , that is, the sequence of states generated by when starts in state . Examples: Are equivalent?

Output Sequences FSM Minimization Given an input sequence , the run leads to the corresponding output sequence . (From ) (From )

Two states and are distinguished by an input string if and only if the Distinguishing Sequences FSM Minimization Two states and are distinguished by an input string if and only if the corresponding runs lead to output sequences and which differ in the last output symbol. Distinguishes and

or (no distinguishing sequence exists). Indistinguishable States FSM Minimization Two states and are indistinguishable if and only if any input sequence gives the same output sequence , irrespective of whether the FSM starts in state or (no distinguishing sequence exists).

Merge Indistinguishable States FSM Minimization Merge

Indistinguishable States FSM Minimization Two states are indistinguishable if (but not only if) they have the same next state and the same output for all inputs States and are indistinguishable Hence, State goes to state for both inputs

which differ only in the last output symbol. Length-k Distinguishing Sequences FSM Minimization Two states and are k-distinguished by a length-k input string if and only if the corresponding runs lead to output strings and which differ only in the last output symbol. String 3-Distinguishes and

In an n-state FSM ( ), and are equivalent if and only if they are k-Equivalent States FSM Minimization If and are not k-distinguishable (no k-distinguishing sequence exists), they are k-equivalent ( ). In an n-state FSM ( ), and are equivalent if and only if they are n-equivalent ( ).

Equivalent States FSM Minimization Because all runs from these states either go back and forth from to , outputting a 0, or converge at Because all runs from these states either go to equivalent states and , outputting a 1, or converge at

For any string , the output strings for runs starting Equivalent FSMs FSM Minimization For any string , the output strings for runs starting from and will be identical.

where and are the -successors of and Theorem FSM Minimization if and only if , and , where and are the -successors of and u Proof (p266): s 1 v Take as , where both and are arbitrary t w 1

is an equivalence relation (reflexive, symmetric, and transitive). Equivalence Classes FSM Minimization The binary relation is an equivalence relation (reflexive, symmetric, and transitive). We denote the equivalence classes of by

Equivalence Classes FSM Minimization

Refinement (Meet) of Two Partitions FSM Minimization The “Meet” of two partitions is just the Cartesian Product (next slide) Example:

Refinement (Meet) of Partitions FSM Minimization Let and denote the partition into equivalence classes induced by inputs and . Note the Cartesian Product element is dropped (by the absorption)

Finding Equivalent States FSM Minimization Find equivalence class partition of 1-equivalent states Extend to equivalence class partition of (k+1)-equivalent states Return partition and length of longest distinguishing sequence

We will use the following example Flow Table Equivalence Classes FSM Minimization We will use the following example Flow Table STG

Finding Equivalent States FSM Minimization Start with maximum partition: all states in a single block Flow Table

The equivalence classes of are FSM Minimization The equivalence classes of are

P Finding Equivalent States = { A , C , E }, t = ( E , E , C ), b = ( FSM Minimization Extend to equivalence class partition of (k+1)-equivalent states P 2 = { A , C , E }, t = ( E , E , C ), 1 b = ( 1 , 1 , 1 ), Pb = ( A , C , E )

x (k+1)-Equivalence Classes ( ) k + 1 FSM Minimization Note Cartesian product of set intersections

+ (k+1)-Equivalence Classes ( ) x k 1 FSM Minimization

Fanin cone (logic cone) Maximal completely connected subgraph Graph Algorithms FSM Traversal Subgraph Connected subgraph Fanin cone (logic cone) Maximal completely connected subgraph If G is undirected, Clique Maximal if it is not a proper subgraph of another subgraph Strongly connected subgraph maximal subgraph for which every pair of included vertices lies on a cycle

States in reached in one step from Note Breadth First Search FSM Traversal States in reached in one step from Note

BFS is modified for use in FSM analysis: BFS For FSMs FSM Traversal BFS is modified for use in FSM analysis: Trace-Back Method to identify shortest paths BDD data structures for representing large state sets Length of the longest shortest path from an initial state to any of the reachable states is called the sequential depth of the machine

DFS is most useful in detecting cycles of a directed graph. Depth-First Search FSM Traversal Unlike BFS, DFS prioritizes depth of penetration, rather than exhausting the current locale before proceeding. DFS proceeds recursively, visiting all transitive successors of a vertex, before completing the DFS of the current active vertex. DFS is most useful in detecting cycles of a directed graph.

Earliest in cycle (later) Depth First Search FSM Traversal When started When completed Earliest in cycle (later)

Procedure DFS(u) { Active Vertex Scan successors Depth First Search FSM Traversal Active Vertex Scan successors Procedure DFS(u) { 1 kpre=kpre+1; preorder[u]=kpre foreach ( ) { 2 if(preorder [a]=0 DFS(a). } 3 kpost=kpost+1; postorder[u]=kpost When Started When Completed Recur if unsearched

Strongly Connected Components FSM Traversal An SCC (Strongly Connected Component) of a directed graph is a subgraph which is maximal with respect to the following property: “There is a path from every vertex to every other vertex, and back”. That is, “every pair of vertices lies on a cycle”.

Strongly Connected Components FSM Traversal When started When completed Earliest (preorder index) in cycle

Shortest Paths Procedure SHORTEST_PATH(V,E,L,v0) { FSM Traversal Procedure SHORTEST_PATH(V,E,L,v0) { 1 for(v  V) v= ; Reached =  2 S = {v0}; v0=0 3 while (S  ) { 4 * = minsS {v} V* = {vV | v = *} 5 v = SELECT1(V*) 6 S=S-{v} Reached = Reached  {v} 7 for (a  ADJ(V,E,v)) { 8 if (a  Reached ) { 9 S = S  {a} 10 a = min(a, v + Lv,a ) } 11 return ()

Models of Sequential Systems FST (Finite State Transition Structures) In a given state, FSTs receive an input symbol, and make a transition to a new state FAs (Finite Automata) are FSTs which also take notice when a favorable state (called accepting) is entered FSMs (Finite State Machine) are FSTs which emit a specified output symbol when they make a transition from one state to another Regular Languages Languages are just sets of sequences of input or output symbols (called strings) Regular languages are just the kind of sets of strings that can be accepted by FAs or generated by FSMs DFA (Deterministic Finite Automata) NFA (Nondeterministic Finite Automata)

Finite State Transition Structures FSTs An FST is defined as a 4-tuple  = <X,S,,S0> X is the input alphabet S is the state set or state alphabet  : S x X  2S is the next state transition function S0  S is a set of initial states Definition FST  = <X,S,,S0> is a deterministic if the image of all pairs (x,s) is a singleton next state In this case, the specified  does not map any given state into a set of two or more states If in addition the initial state set S0 of  is a singleton set,  is said to be strongly deterministic If the mapping  is specified for all pairs of states and input symbols,  is said to be complete

Finite State Transition Structures FSTs NFAs and -moves -moves, which represent the further conceptual ability of an NFA to be in more than one state at a time The concept of -moves is important in the procedure for deciding whether a specified string is accepted by a given FA and for constructing a DFA which accepts the same language as a given NFA FSTs as labeled diagraphs Sometimes an FST  = <X,S,,S0> is specified by giving its STG : G=(S,E,L) The vertices s  S correspond to the states of  The edge (s,t)  E are directed from s to t and signify a possible state transition (s,t)  E  t = (s,x) For each edge s, t E of G L(s,t) ={x  X| t  (s,x)} = {x  X| t = (s,x)}

Finite State Transition Structures FSTs Strings, Tapes and Runs A run of an FST is a sequence of states which starts in an initial state S0 occurs in response to some possible input sequence A sequence of inputs is called a string if it is finite and a tape if it is infinite

Traversing the Product STG Equivalence Checking Equivalence checking requires testing output pairs at every reachable state A state t is reachable from state s if there exists a string x which produces a run s, ending in state t The act of identifying the set of reachable states of an FSM is called FSM Traversal In Traversal, we systematically search the STG from the initial state. Any method can be used but the most efficient is based on BFS (Breadth First Search)

Building the Product Machine Equivalence Checking Check this condition for all reachable product states Comparator FST ( ) PRODUCT Common input

Building the Product (STG View) Equivalence Checking Note output of product machine is 1 for all inputs at all reachable states

Start by finding states and reachable from initial state of product . Building the Product (STG View) Equivalence Checking Start by finding states and reachable from initial state of product .

Continue by finding state reachable from Building the Product (STG View) Equivalence Checking Continue by finding state reachable from previous new state of product .

Specific to FSMs Equivalence Checking Product Machine Same as BFS

Finding a Shortest Error Trace Equivalence Checking Returned: run s, which starts at initial state and ends at error state.

BFS for Error Trace Suppose all outputs were 1 except on edge from Equivalence Checking Suppose all outputs were 1 except on edge from s2 to s1. Then a shortest error trace would be s=(s5,s4,s1,s2), x=(0,1,0,0)

Isomorphism Equivalence Checking Two graphs Ga = (Va, Ea) and Gb = (Vb, Eb) are said to be isomorphic if |Va| = |Vb| if the nodes of Va can be relabeled so that the two graphs are identical A relabeling function is a function  : Va  Vb such that for each node vb  Vb there is exactly one node va  Va such that vb = (va) Such a function is said to be 1 to 1 and onto and is called an isomorphism

BDD Representation of Reached Sets Reachability Analysis FSM Traversal requires storage of various reachable states sets ( , etc.) For a circuit with 64 latches, there could be as many as reachable states It is clearly infeasible to store an “int” to identify each individual state Thus BDDs must be used to represent sets of states

BDD Representation of State Sets Reachability Analysis Encoding: (codes packed around origin)

BDD Representation of State Sets Reachability Analysis Minterm count = path count (3 paths for all n) Missing variables amplify minterm count

BDD Representation of State Sets Reachability Analysis

Symbolic FSM State Traversal Symbolic Traversal Image The set of co-domain points Preimage Transition relations Given a deterministic transition function (s,x), T(s,x,t) = i=ni=1 (ti i(s,x)) T(s,x,t)=1 denotes a set of encoded triples s,x,t of state s, input x and x-successor t of s, each representing a transition in the FST if the given FSM Existential abstraction Given an m-variable Boolean function f(x1, ,,, xm), xi f = fxi + fxi’ where fxi(fxi’) is positive(negative) cofactor I(t) = Img(T,C) = xsC(s) T(s,x,t)