Elec 2607 Digital Switching Circuits

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Elec 2607 Digital Switching Circuits Lecture 7 & 8: Digital Logic 16/11/2018 ELEC 2607 Lecture 7 & 8:

16/11/2018 ELEC 2607 Lecture 0:

ANOTHER FORM OF Digital Logic 16/11/2018 ELEC 2607 Lecture 7 & 8:

2017 16/11/2018 ELEC 2607 Lecture 7 & 8:

Lots to do in two lectures 16/11/2018 ELEC 2607 Lecture 7 & 8:

The most basic digital latch 16/11/2018 ELEC 2607 Lecture 7 & 8:

The most basic digital latch 16/11/2018 ELEC 2607 Lecture 7 & 8:

The most basic digital latch 16/11/2018 ELEC 2607 Lecture 7 & 8:

16/11/2018 ELEC 2607 Lecture 7 & 8:

Basic latch with SET and RESET O10 101 Same = stable Same = stable Basic latch with SET and RESET 16/11/2018 ELEC 2607 Lecture 7 & 8:

Basic latch with SET and RESET 16/11/2018 ELEC 2607 Lecture 7 & 8:

Basic latch with SET and RESET 16/11/2018 ELEC 2607 Lecture 7 & 8:

16/11/2018 ELEC 2607 Lecture 7 & 8:

Asserted = DOES ITS JOB WHEN …. Basic latch with SET and RESET 16/11/2018 ELEC 2607 Lecture 7 & 8:

Asserted = DOES ITS JOB WHEN …. Stable 0 Asserted = DOES ITS JOB WHEN …. Change 0  1 Stable 1 Basic latch with SET and RESET 16/11/2018 ELEC 2607 Lecture 7 & 8:

Asserted = DOES ITS JOB WHEN …. Basic latch with SET and RESET 16/11/2018 ELEC 2607 Lecture 7 & 8:

Asserted = DOES ITS JOB WHEN …. Basic latch with SET and RESET Stable 1 Change 1  0 Stable 0 16/11/2018 ELEC 2607 Lecture 7 & 8:

6 16/11/2018 ELEC 2607 Lecture 7 & 8:

The RESET-SET (RS) Latch 16/11/2018 ELEC 2607 Lecture 7 & 8:

S = SET R = RESET Additional notes on Board The RESET-SET (RS) Latch Start with Q = 0, R = 1, S = 0 Change S to 1: Q goes to 1 and stays at 1 Change S to 0: Q stays a 1 Latch is SET using S asserted high Start with Q = 1, R = 1, S = 0 Change R to 0: Q goes to 0 and stays at 0 Change R to 1: Q stays at 0 Latch is RESET using R asserted low The RESET-SET (RS) Latch S = SET R = RESET Additional notes on Board 16/11/2018 ELEC 2607 Lecture 7 & 8:

The RESET-SET (RS) Latch 2 Complement of logic Using invert on input The RESET-SET (RS) Latch Start with Q = 0, L = 1, S = 1 Change S to 0: Q goes to 1 and stays at 1 Change S to 1: Q stays a 1 Latch is SET using S asserted low Start with Q = 1, L = 1, S = 1 Change L to 0: Q goes to 0 and stays at 0 Change L to 1: Q stays at 0 Latch is RESET using R asserted low 16/11/2018 ELEC 2607 Lecture 7 & 8:

S = SET R = RESET Additional notes on Board The RESET-SET (RS) Latch Start with Q = 0, R = 1, S = 0 Change S to 1: Q goes to 1 and stays at 1 Change S to 0: Q stays a 1 Latch is SET using S asserted high Start with Q = 1, R = 1, S = 0 Change R to 0: Q goes to 0 and stays at 0 Change R to 1: Q stays at 0 Latch is RESET using R asserted low The RESET-SET (RS) Latch S = SET R = RESET Additional notes on Board 16/11/2018 ELEC 2607 Lecture 7 & 8:

The RESET-SET (RS) Latch 2 Complement of logic Using invert on input Start with Q = 0, R = 0, S = 0 Change S to 1: Q goes to 1 and stays at 1 Change S to 0: Q stays a 1 Latch is SET using S asserted high Start with Q = 1, R = 0, S = 0 Change R to 1: Q goes to 0 and stays at 0 Change R to 0: Q stays at 0 Latch is RESET using R asserted high The RESET-SET (RS) Latch 16/11/2018 ELEC 2607 Lecture 7 & 8:

3 See Floyd page 377 16/11/2018 ELEC 2607 Lecture 7 & 8:

Note on feedback signals OUTPUT Q Q as input Use “q” lowercase The TRANSPARENT (D) Latch 16/11/2018 ELEC 2607 Lecture 7 & 8:

The TRANSPARENT (D) Latch 16/11/2018 ELEC 2607 Lecture 7 & 8:

2 16/11/2018 ELEC 2607 Lecture 7 & 8:

The TRANSPARENT (D) Latch Transparent High Transparent Low 16/11/2018 ELEC 2607 Lecture 7 & 8:

The TRANSPARENT (D) Latch Transparent High Transparent Low 16/11/2018 ELEC 2607 Lecture 7 & 8:

The TRANSPARENT (D) Latch Transparent High Transparent Low 16/11/2018 ELEC 2607 Lecture 7 & 8:

16/11/2018 ELEC 2607 Lecture 7 & 8:

The Edge triggered (D) Flip Flop 16/11/2018 ELEC 2607 Lecture 7 & 8:

The Edge triggered (D) Flip Flop 16/11/2018 ELEC 2607 Lecture 7 & 8:

The Edge triggered (D) Flip Flop 16/11/2018 ELEC 2607 Lecture 7 & 8:

2 16/11/2018 ELEC 2607 Lecture 7 & 8:

16/11/2018 ELEC 2607 Lecture 7 & 8:

16/11/2018 ELEC 2607 Lecture 7 & 8:

Master-Slave Edge Triggered Flip Flop 16/11/2018 ELEC 2607 Lecture 7 & 8:

Master-Slave Edge Triggered Flip Flop 16/11/2018 ELEC 2607 Lecture 7 & 8: Timing diagram follows next

This device acts as a falling edge triggered flip-flop: The output is changed at the falling edge of the clock cycle. clock Falling edge triggered 16/11/2018 ELEC 2607 Lecture 7 & 8:

Master-Slave Edge Triggered Flip Flop Change occurs at falling edge 16/11/2018 ELEC 2607 Lecture 7 & 8:

2 T 16/11/2018 ELEC 2607 Lecture 7 & 8:

Propagation delay taken as zero H H T T T T H H T T H H T T H H 16/11/2018 ELEC 2607 Lecture 7 & 8: Propagation delay taken as zero

Propagation delay taken as zero H T T H T H H T T H H T T H H T T H T H T H T H H T H T H T H T 16/11/2018 ELEC 2607 Lecture 7 & 8: Propagation delay taken as zero

Propagation delay taken as zero T T T T T T T T 16/11/2018 ELEC 2607 Lecture 7 & 8: Propagation delay taken as zero

Propagation delay taken as zero T H H T T H H T T H H T T H H T Propagation delay taken as zero 16/11/2018 ELEC 2607 Lecture 7 & 8:

Special Controls: Asynchronous Reset 16/11/2018 ELEC 2607 Lecture 7 & 8:

16/11/2018 ELEC 2607 Lecture 7 & 8:

Special Controls: Synchronous Reset 16/11/2018 ELEC 2607 Lecture 7 & 8:

16/11/2018 ELEC 2607 Lecture 7 & 8:

Flip-flop circuits: Divide Clock Frequency by 2 16/11/2018 ELEC 2607 Lecture 7 & 8:

16/11/2018 ELEC 2607 Lecture 7 & 8:

Flip-flop circuits: Shift register 16/11/2018 ELEC 2607 Lecture 7 & 8:

16/11/2018 ELEC 2607 Lecture 7 & 8:

Flip-flop Memory Values = STATES 16/11/2018 ELEC 2607 Lecture 7 & 8:

16/11/2018 ELEC 2607 Lecture 7 & 8:

Special Controls: Enable 16/11/2018 ELEC 2607 Lecture 7 & 8:

16/11/2018 ELEC 2607 Lecture 7 & 8:

SUMMARY 16/11/2018 ELEC 2607 Lecture 7 & 8:

16/11/2018 ELEC 2607 Lecture 7 & 8: