Digital Processing Platform

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Presentation transcript:

Digital Processing Platform Low power micro-controller Small size for compact integration Enables adaptation of node behavior with changing requirements, environmental characteristics, and network state Enables experimentation with different algorithms and protocols Enables use of energy saving processor modes and associated operating system functionality Development of streamlined software implementations Highly memory-constrained software implementations are required due to size and energy constraints Leverage our previous work in synthesis of memory-efficient embedded software implementations Employ formal programming models, and apply graph-theoretic analysis and optimization of program structure Smart Dust Digital Processing, 1

Task Assignment Algorithms Need to balance communication and computation throughout the network Develop models of power consumption in network nodes and communication links Develop task graph models of overall network functionality Develop algorithms to embed task graph algorithm specifications into the network Assign processing tasks to network nodes Turn off idle nodes Large design space Explore evolutionary algorithms to optimize task graph embeddings Smart Dust Digital Processing, 2