Algorithms for VLSI Computer Aided Design D. Zhou E.E. Department, UTD Richardson, TX 75083 zhoud@utdallas.edu 2018/11/17 Algorithms for VLSI CAD

Topics Introduction to VLSI Design Automation Physical design Verification High-level synthesis 2018/11/17 VLSI Physical Design

Introduction to VLSI Design Automation CAD (or EDA) tools Introduction to algorithms Computational complexity 2018/11/17 VLSI Physical Design

Physical design Routing Floor plan and placement Detailed routing Global routing Floor plan and placement Interconnect circuit order reduction Buffer sizing and insertion Clock signal distribution Power distribution Timing analysis 2018/11/17 VLSI Physical Design

Verification Equivalent checking SAT problem Integer programming 2018/11/17 VLSI Physical Design

High-level synthesis Scheduling Resource allocation 2018/11/17 VLSI Physical Design

Grading policy Homework ->15%, reading assignment ->15%, middle term project ->30%, and final project ->40%. 85-100 ->A, 70-84 ->B, 60-69 ->C, below 60 ->F 2018/11/17 VLSI Physical Design

References 1. N. Sherwani, “Algorithms for VLSI Physical Design,” Kluwer Academic Publishers, 1999. 2. T. H. Cormen and etc., “Introduction to Algorithms,” McGraw-Hill, 2001. 3. M. R. Garey and D. S. Hohnson, “Computers and Intractability,” W. H. Freeman and Company, 1979. 4. S. M. Rubin, “Computer Aids for VLSI Design,” Addison-Wesley, 1987. 5. W. Wolf, “Modern VLSI design,” Prentice Hall, 2002. 6. N. Weste and K. Eshraghian, “Principles of CMOS Design,” Addison-Wesley Publishing Company, 1993. 2018/11/17 VLSI Physical Design