Day 22: October 31, 2011 Pass Transistor Logic ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 22: October 31, 2011 Pass Transistor Logic Penn ESE370 Fall2011 -- DeHon

Previously Penn ESE370 Fall2011 -- DeHon

Two Xor Gates Penn ESE370 Fall2011 -- DeHon

Today Pass Transistor Circuit Transmission gates Tristate gates Output levels Cascading Series pass transistors? Delay Transmission gates Tristate gates Penn ESE370 Fall2011 -- DeHon

Cascading Pass Transistors Penn ESE370 Fall2011 -- DeHon

Chain without Inverters What if we did this? Penn ESE370 Fall2011 -- DeHon

Extract key path Penn ESE370 Fall2011 -- DeHon

t=0 (after Vin transition 10) Penn ESE370 Fall2011 -- DeHon

t=4t (after Vin transition 10) Penn ESE370 Fall2011 -- DeHon

t=∞ (after Vin transition 10) Penn ESE370 Fall2011 -- DeHon

Focus on Pass tr Vgs? Operation mode? Current flow? Penn ESE370 Fall2011 -- DeHon

Voltage of Chain What is voltage at output? Penn ESE370 Fall2011 -- DeHon

How compare Compare Penn ESE370 Fall2011 -- DeHon

DC Analysis Penn ESE370 Fall2011 -- DeHon

DC Analysis – chain of 6 Penn ESE370 Fall2011 -- DeHon

Conclude Can chain any number of pass transistors and only drop a single Vth Penn ESE370 Fall2011 -- DeHon

Capacitance What is Capacitance per stage (@y)? Penn ESE370 Fall2011 -- DeHon

Delay Delay as a function of chain length? Penn ESE370 Fall2011 -- DeHon

Compare CMOS Buffered Pass TR Unbuffered Pass TR Delay Area Penn ESE370 Fall2011 -- DeHon

Pass TR Tree What if we did this? Penn ESE370 Fall2011 -- DeHon

Path What’s different about this? Penn ESE370 Fall2011 -- DeHon

Gate Cascade? What are voltages? Penn ESE370 Fall2011 -- DeHon

Demonstration Circuit Penn ESE370 Fall2011 -- DeHon

SPICE TODO show spice results of voltages Penn ESE370 Fall2011 -- DeHon

Demonstration Chain Penn ESE370 Fall2011 -- DeHon

Spice Penn ESE370 Fall2011 -- DeHon

Conclude Cannot cascade degraded inputs into gates. Penn ESE370 Fall2011 -- DeHon

Pass Rail-to-Rail Penn ESE370 Fall2011 -- DeHon

Transmission Gate Penn ESE370 Fall2010 -- DeHon

Bus Drivers Penn ESE370 Fall2011 -- DeHon

Tristate Driver Penn ESE370 Fall2010 -- DeHon

Tri-State Drivers

Admin Project Midterm 2: Nov. 9th Due Friday Week from today in the evening Penn ESE370 Fall2011 -- DeHon

Midterm Topics Scaling Logic Tau-model Elmore-delay No clocking Estimation and optimization Elmore-delay Energy and power Logic CMOS Ratioed Pass transistor No clocking Except to motivate delay targets and power calculations Note: 2010 midterm Q4 – Cdiff, trans gates, Elmore, opt. Penn ESE370 Fall2011 -- DeHon

Idea There are other circuit disciplines Can use pass transistors for logic Even chains of pass transistors Sometimes gives area or delay win Do not cascade as easily as CMOS Penn ESE370 Fall2011 -- DeHon