Paging Lecture 15 18 November 2018.

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Presentation transcript:

Paging Lecture 15 18 November 2018

Paging Process Address Space 1 2 1 2 … 3 4 5 6 9 7 10 15 1 2 … 9 10 15 1 2 3 4 5 6 7 Process Address Space 18 November 2018

Physical Address Space Paging 1 2 … 9 10 15 1 2 3 4 5 6 7 Page 3 9 11 … 1 1 2 3 … 7 Page Table Process Address Space Physical Address Space 18 November 2018

Physical Address Space Paging 1 2 … 9 10 15 1 2 3 4 5 6 7 9 … 1 2 3 … 7 Page Table Process Address Space Physical Address Space 18 November 2018

Address Translation f 18 November 2018

Paging Example Page size = 4 bytes Process address space = 4 pages Page size = 4 bytes Process address space = 4 pages Physical address space = 8 frames Logical address: (1,3) = 0111 Physical address: (6,3) = 11011 Page Frame 1 0111 2 3 11011 18 November 2018

Addressing in Paging Logical address space of 16 pages of 1024 words each, mapped into a physical memory of 32 frames. Logical address size? Physical address size? Number of bits for p, f, and d? 18 November 2018

Addressing in Paging No. of bits for p = ceiling [log2 16] bits No. of bits for f = ceiling [log2 32] bits = 5 bits No. of bits for d = ceiling [log2 2048] bits = 11 bits 18 November 2018

Addressing in Paging Logical address size = |p| + |d| = 4+11 = 15 bits Physical address size = |f| + |d| = 5+11 = 16 bits 18 November 2018

Page Table Size Page table size = NP * PTES where NP is the number of pages in the process address space and PTES is the page table entry size (equal to |f| based on our discussion so far). Page table size = 16 * 5 bits = 16 bytes 18 November 2018