Crash Course on Clock Jitter

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Presentation transcript:

Crash Course on Clock Jitter Victor Alberto Lopez Nikolskiy

Some theory first http://knowyourmeme.com/memes/pepe-silvia

Clock jitter Jitter is the timing variation of a signal edge from its ideal value. In the frequency domain it would look like a broadening of the carrier frequency. Jitter is caused by the superposition of noise sources: the oscillator crystal has thermal noise and creates mechanical perturbations, the amplifier’s noise and the power supply [1]. Why is it important on HSD? Timing. Considering jitter will prevent our system to have enough setup time or hold time if we know the behavior or our clock. [2] Figure. Clock with jitter as seen in the time domain

How to calculate it? Phase noise power and integration: W. Kester in “Converting Oscillator Phase Noise to Time Jitter” has the method followed for this experiment “Phase noise power is the ratio of the power density at an offset frequency from the carrier to the total power of the carrier signal”[3] http://www.analog.com/media/en/training-seminars/tutorials/MT-008.pdf

Now experimentation http://drragnar.weebly.com/blog

How to make a lab experiment for students to see it and measure it? The CD4046 PLL includes a VCO which allows to create a square wave up to 1 MHz. If the power supply is not noisy, then the observable jitter should be from the clock itself. A square wave signal generator could also be used for practice

What we get?

1. The oscilloscope gives the Fourier transform of the square wave in terms of dBV. For this example I will consider dBV as an idea of the phase noise power. A spectrum analyzer should be able to give it in terms of dBm 2. Integrate and calculate the jitter. This example linearly interpolated ~ A = -81.185 dBc, which gives a jitter of 26.27 ps. Our time period is 1.33 us. VCO at VDD = 10 V and VCO_IN = 7.85 V

Things coming up for the project report Use the spectrum analyzer to get the phase noise power in terms of dBm or dB Compare the jitter of the 4046 PLL VCO at VDD = 10 V and VDD = 15 V Calculate jitter of the square wave function from the signal generator in the labs

References [1] Johnson, H.; Graham, M. (2013) “HIGH-SPEED DIGITAL DESIGN A HANDBOOK OF BLACK MAGIC”. Prentice Hall PTR. Pp 376. [2] SiTime (2014) “Clock Jitter Definitions and Measurement Methods”. SiT-AN10007 Rev 1.2. pp2 . [3] Gheen, K. Phase: “Noise Measurement Methods and Techniques”. Agilent Technologies. Retrieved Online: https://www.keysight.com/upload/cmc_upload/All/PhaseNoise_webcast_19Jul12.pdf Kester, W. (2009) “Converting Oscillator Phase Noise to Time Jitter” Analog Devices. Retrieved online http://www.analog.com/media/en/training-seminars/tutorials/MT-008.pdf