Memory organization On- chip memory Off-chip memory Internal memory External Data memory (upto 64KB) RAM Internal SFRs External Code memory (upto 64KB) ROM Internal ROM Internal RAM 18-Nov-18 Micro 8051

On-Chip Memory Internal RAM 18-Nov-18 Micro 8051

8051 CPU Registers A (Accumulator) B PSW (Program Status Word) SP (Stack Pointer) PC (Program Counter) DPTR (Data Pointer) Used in assembler instructions 18-Nov-18 Micro 8051

General Purpose Register 1F 18 Bank 3 4 Register Banks Each bank has R0-R7 Selectable by PSW.2,3 17 10 Bank 2 0F 08 Bank 1 07 06 05 04 03 02 01 00 R7 R6 R5 R4 R3 R2 R1 R0 Bank 0 18-Nov-18 Micro 8051

Bit Addressable Memory 2F 2E 2D 2C 2B 2A 29 28 20h – 2Fh (16 locations  8-bits = 128 bits) 7F 78 1A 10 0F 08 07 06 05 04 03 02 01 00 27 26 25 24 23 22 21 20 18-Nov-18 Micro 8051

Summary of on-chip data memory (RAM) MOV C, 67H ≡ MOV C, 2CH.7 18-Nov-18 Micro 8051

Summary of on-chip data memory 18-Nov-18 Micro 8051

Special Function Registers DATA registers CONTROL registers Timers Serial ports Interrupt system Etc. Addresses 80h – FFh Direct Addressing used to access SFRs 18-Nov-18 Micro 8051

Port 0 with external pull-up resistors 8751 8951 Vcc 10 K Port 0 18-Nov-18 Micro 8051

How the ports can be used as input? Port 0 as input Port must be programmed by writing 1 to all the bits. E.g REPEAT: MOV A, #0FFH MOV P0, A MOV A, P0 MOV P1, A SJMP REPEAT Similarly for Port 1 when used as input. 18-Nov-18 Micro 8051

Continues… Port 3 Alternate functions: P3.0 RxD Serial Input line P3.1 TxD Serial Output line P3.2 INT0 External interrupt 0 P3.3 INT1 External interrupt 1 P3.4 T0 Timer0 External input P3.5 T1 Timer1 External input P3.6 WR External data memory WR strobe P3.7 RD External data memory RD strobe 18-Nov-18 Micro 8051

Address Multiplexing for External Memory (code) 18-Nov-18 Micro 8051

18-Nov-18 Micro 8051

Stack Concepts

Continues…

Examples of Push operation

Examples of POP operation