SAMURAI Si detector Requirements overview Detector team M. Kurokawa N. Iwasa, A. Taketani, Y. Togano, H. Murakami, T. Motobayashi, K. Yoneda Requirements overview Development of readout circuit (ASIC chip for preamplifier) Summary (present status and future subjents)

Requirements overview on silicon detector both of them are analyzed by SAMURAI proton Heavy Ion (z <50) 0.5O secondary target (Pb etc.) Si detectors RI beam from BigRips Effective area of Si detector > 9 cm  9 cm Position resolution dx ~ 0.2 mm, dy ~ 0.2 mm 6 pieces of GLAST Si detectors are necessary (x, y, left and right angle ambiguity)  2 (already available)

Specification of the GLAST Si Ref. ) T. Ohsugi et al Specification of the GLAST Si Ref.) T. Ohsugi et al., “Design and properties of the GLAST flight silicon micro-strip sensors”, Nucl. Instr. and Methods, A541 (2005) 29 - 39. single sided strip detector manufactured by HPK 500 pF 50 MW 6 in. --> 325 mm to read leakage current of each strip capacitance/strip 2 pF Interstrip capacitance 5 pF

Requirements overview on readout circuit total number of strips is around 2500 dynamic range has to be larger than 5000 to detect proton (z = 1, 10 fC) and heavy ion (z < 50, 25 pF) (and its pile up) Employment of ASIC(Application Specificated Integrated Circuit) has been considered because of I. Architecture of HINP16C ASIC chip corresponds to our purpose basically. Collaboration is very helpful for our development, but some of the works are of our own subjects. For example, enlargement of the dynamic range. Ref.) G. L. Engel et al., “A multi-channel integrate circuit for use in low- and intermediate-energy nuclear physics---HINP16C”, Nucl. Instr. and Methods A573 (2007) 418 - 426.

Enlargement of dynamic range by 10 times capacitive division Ref.) N. Uematsu and S. Nishimura, “Development of silicon strip detector with wide-dynamic-range readout system from 20 keV to 4 GeV”, RIKEN Accel. Prog. Rep. 41, (2008) 151. saturation suppression by making use of the relation Vout = Q / Cf Detail will be discussed in following talk by Murakami-san Chigh 3.6 fC ~ 36 pC high gain(for proton) useful for 4 fC ~ 4 pC Qin 4 fC ~ 40 pC CSP Clow= Chigh / 10 low gain(for HI) useful for 40 fC ~ 40 pC CSP 0.36 fC ~ 3.6 pC Cd Vout This function can be　implemented in ASIC chip? training course at KEK to learn how to make it with saturation suppression Without saturation suppression Qin

Threshold for starting ASIC Initial cost Performance (basically, ASIC consists of enormous number of MOSFETs) Was not for signal channels of only a few hundreds Was for limited purpose, to find fired channel, for example. Not commonly used for experiment involving detection of heavy ions at low and intermediate-energy region shuttle service Library(accumulated know-how)

Introduction of some techniques established in MOS analog circuit increasement of the open loop gain in HINP16C case as an example Vgs1’ Vds2 Id M2 Vgs2 DId M1 Id Vgs1 w/l--> small Vgs2 = 1.4 V w/l--> large Vgs1 = 1.1 V 1. 4 + 1.1 > 1.4 M1 Vds1 Vd 0 --> -2 V out -DVgs1(= DVds2)

Prototype chip RIKENDGCSP Cf = 1.8 pF “Schematic diagram” Chigh Rf corresponding to 50 MW -A Cf = 1.8 pF Clow Rf corresponding to 50 MW -A RIKENDGCSP w/l--> small w/l--> large w/l--> small Open loop gain (A) is large ~ 82 dB by employing the technique shown in previous slide w/l--> large w/l--> large Output: +0.5 ~ -2.0 V input w/l--> small

Why we need to increase the open loop gain? Cf Chigh Zhigh = 1 / (Chigh s) + Zf/A -A Pulse heights at t = 1 ms are estimated by simulation code HSPICE and are plotted below. Cf Clow= Chigh / 10 -A Zlow = 1 / (Clow s) + Zf/A A --> ∞ is ideal also for rising time A = 500 --> 10000 (82 db) by using cascode connection of current mirrors A = 500 A = 10000 suppression circuit begins to work low gain high gain ratio of the slope = 2.6 Chigh (= 5 nF) : Clow (= 500 pF) = 1 : 10

Prototype chip RIKENDGCSP II size : ~1.6 mm  1.2 mm ch num.: high gain output 1 ch, low gain output 1 ch function: preamplifier Will be ready in Feb. 2010 ? size :3 mm  3 mm ch num.: high gain output 8 ch, low gain output 8 ch function: preamplifier, shaping amplifier, (peak hold, multiplexer,,,,,,,) cost: 1000,000 yen for 20 chips (160 pairs)?

Ideas for next version Another circuit to suppress the saturation Preparation of spare channel for strips at central position CSA input

Ideas for another application of ASIC x, y “highly segmented Ge detector” Position information can be extracted even for multiple scattering increase of signal channels ASIC “segmented Ge detector” g CSA SCA (x, y, z) CSA CR2 - RC4 Comp. information on z CSA SCA information on x, y Wave form can be stored with sequential capacitive arrays Ref.) MATACQ 2 G samples/s z

Present status and subjects of SAMURAI Si readout circuit Technique to enlarge the dynamic range will be established soon with the ASIC chip RIKENDGCP. “characteristics of RIKENDGCP” dynamic range: 4 fC ~ 40 pC open loop gain: 82 dB saturation suppression function:employed The performance is verified with SPICE simulation. The first prototype will be tested in Feb. 2010.

cooling system of the circuit advantage --> Number of feed through connectors can be significantly suppressed 16 ch  2 = 32 ch 1.5 W/board 32 ch 16 = 512 ch Cf.) GLAST Si: 384 2 ch / piece Example of HINP16C cross talk How many strips are fired (higher than proton threshold) when HI is implanted? any way for suppression? 500 pF 2 pF 5 pF 5 pF