Subject Name: Microprocessors Subject Code:10EC46 Department: Electronics and Communication Date:30-3-2015 11/20/2018

UNIT: 4 8086 INTERRUPTS

8086 Interrupts and interrupt responses. Hardware interrupt applications. Software interrupt applications. Interrupt examples.

Interrupts An interrupt is the method of accessing the MPU by a peripheral device. An interrupt is used to cause a temporary halt in the execution of a program. When the 8086 is executing a program, it can get interrupted because of one of the following. 1.Due to an interrupt getting activated. This is called as hardware interrupt . 2.Due to an exceptional happening during an instruction execution, such as division of a number by zero. This is generally termed as exceptions or Traps. 3.Due to the execution of an Interrupt instruction like "INT 21H". This is called a Software interrupt.

Basic Types of interrupts There are two basic types of interrupts: Maskable non-maskable. Nonmaskable interrupt requires an immediate response by the MPU. It is usually used for serious circumstances like power failure. A maskable interrupt is an interrupt that theMPU can ignore depending upon some predetermined condition defined by the status register. Interrupts are also prioritized to allow for the case when more than one interrupt needs to be serviced at the same time. Further interrupts in 8086 are divided in to: Hardware interrupts Software interrupts

Hardware interrupts It is also called as External Interrupts. Two pins that allow interrupt requests, INTR and NMI One pin that acknowledges, INTA, the interrupt requested on INTR. INTR and NMI INTR is a maskable hardware interrupt. The interrupt can be enabled/disabled using STI/CLI instructions or using more complicated method of updating the FLAGS register with the help of the POPF instruction. When an interrupt occurs, the processor stores FLAGS register into stack, disables further interrupts, fetches from the bus one byte representing interrupt type, and jumps to interrupt processing routine address of which is stored in location 4 . Interrupt processing routine should return with the IRET instruction

Non / Maskable interrupt NMI is a non-maskable interrupt. Interrupt is processed in the same way as the INTR interrupt. Interrupt type of the NMI is 2, i.e. the address of the NMI processing routine is stored in location 0008h. This interrupt has higher priority than the maskable interrupt. Ex: NMI, INTR.

Performance of Hardware interrupts

software Interrupts It comprises of Internal Interrupts and Instructions . Software interrupts can be caused by: INT instruction - breakpoint interrupt. This is a type 3 interrupt. INT<instruction number> instruction - any one interrupt from available 256 interrupts. INTO instruction - interrupt on overflow Single-step interrupt - generated if the TF flag is set. This is a type 1 interrupt. When the CPU processes this interrupt it clears TF flag before calling the interrupt processing routine.

Performance of Software interrupts

8259 block diagram

IRR: Stores all the interrupt levels which are requesting for service ISR: Stores all the levels that are currently being serviced IMR: Stores the masking bits of the interrupt lines to be masked PRIORITY RESOLVER: Determines the priorities of the bits set in the IRR CASCADE BUFFER COMPARATOR: Generates control signals necessary for cascade operation 11/20/2018

PRIORITY MODES 1. Fully nested mode 2. Rotating Priority mode 3 PRIORITY MODES 1. Fully nested mode 2. Rotating Priority mode 3. Special Masked mode 4. Polled mode 11/20/2018

Register format

Register format

Register format

Program flow

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