Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques HPCA Session 3A – Monday, 3:15 pm,

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Presentation transcript:

Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques HPCA Session 3A – Monday, 3:15 pm, Salon F 128GB NAND Flash 01 11 11 00 256GB NAND Flash 11 10 00 10 NAND flash scaling: shrink size of each flash cell, store two bits per cell

Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques HPCA Session 3A – Monday, 3:15 pm, Salon F 128GB NAND Flash 01 11 11 00 256GB NAND Flash 11 10 00 10 NAND flash scaling: shrink size of each flash cell, store two bits per cell 11 10 Program ?? 00 10 10 As the cells become smaller, they interfere with each other during programming…

Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques HPCA Session 3A – Monday, 3:15 pm, Salon F 128GB NAND Flash 01 11 11 00 256GB NAND Flash 11 10 00 10 NAND flash scaling: shrink size of each flash cell, store two bits per cell 11 10 Program ?? 00 Step 1 Step 2 ?? ?0 00 10 10 …to reduce interference, today’s MLC NAND flash chips use two-step programming As the cells become smaller, they interfere with each other during programming…

Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques HPCA Session 3A – Monday, 3:15 pm, Salon F Using real MLC NAND flash chips, we show that two-step programming introduces new reliability and security vulnerabilities

Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques HPCA Session 3A – Monday, 3:15 pm, Salon F Using real MLC NAND flash chips, we show that two-step programming introduces new reliability and security vulnerabilities We find that cells with only one bit programmed are more vulnerable to interference during reads and writes than fully-programmed cells Controller MSB data Flash Memory MSB . . . LSB Read With Errors . . . MSB 0 LSB 0 MSB 1 LSB 1 Read Without Errors MSB n LSB n . . .

Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques HPCA Session 3A – Monday, 3:15 pm, Salon F Using real MLC NAND flash chips, we show that two-step programming introduces new reliability and security vulnerabilities We find that cells with only one bit programmed are more vulnerable to interference during reads and writes than fully-programmed cells Controller MSB data Flash Memory MSB . . . LSB Read With Errors . . . MSB 0 LSB 0 MSB 1 LSB 1 Read Without Errors MSB n LSB n . . . Error Rate ECC Limit Vulnerabilities can be exploited to corrupt data and reduce flash lifetime Malicious Normal Lifetime

Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques HPCA Session 3A – Monday, 3:15 pm, Salon F We propose three solutions to minimize vulnerabilities at negligible latency overhead

Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques HPCA Session 3A – Monday, 3:15 pm, Salon F We propose three solutions to minimize vulnerabilities at negligible latency overhead One solution completely eliminates vulnerabilities 4.9% increase in flash programming latency

Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques HPCA Session 3A – Monday, 3:15 pm, Salon F We propose three solutions to minimize vulnerabilities at negligible latency overhead One solution completely eliminates vulnerabilities 4.9% increase in flash programming latency Two other solutions mitigate vulnerabilities No increase in flash latency, errors not completely eliminated Increases flash lifetime by 16% Baseline Solution #3 16%

Want more? Come to our talk! Read our paper! Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques HPCA Session 3A – Monday, 3:15 pm, Salon F We propose three solutions to minimize vulnerabilities at negligible latency overhead One solution completely eliminates vulnerabilities 4.9% increase in flash programming latency Two other solutions mitigate vulnerabilities No increase in flash latency, errors not completely eliminated Increases flash lifetime by 16% Want more? Come to our talk! Read our paper! Authors: Yu Cai, Saugata Ghose, Yixin Luo, Ken Mai, Onur Mutlu, Erich F. Haratsch Baseline Solution #3 16%