OpenFabrics Interfaces Working Group Co-Chair Intel November 2016

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Presentation transcript:

OpenFabrics Interfaces Working Group Co-Chair Intel November 2016 THE LATEST ON OPENFABRICS INTERFACES (OFI): THE NEW SCALABLE FABRIC SW LAYER FOR SUPERCOMPUTERS Sean Hefty OpenFabrics Interfaces Working Group Co-Chair Intel November 2016

OFIWG: develop … interfaces aligned with … application needs Open Source Application-Centric Expand open source community Inclusive development effort App and HW developers Software interfaces aligned with application requirements Careful analysis of requirement libfabric Implementation Agnostic Scalable Optimized SW path to HW Minimize cache/memory footprint Reduce instruction count Minimize memory accesses Good impedance match with multiple fabric hardware InfiniBand*, iWarp, RoCE, Ethernet, UDP offload, Intel®, Cray*, IBM*, others 3 * Other names and brands may be claimed as the property of others

OFI APPLICATION REQUIREMENTS OFI strives to meet both requirements Give us a high-level interface! Give us a low-level interface! MPI developers OFI strives to meet both requirements

OFI SOFTWARE DEVELOPMENT STRATEGIES One Size Does Not Fit All Application Application Application App uses OFI features OFI OFI App optimizes based on supported features Provider Common optimization for all apps/providers OFI Provider optimizes for OFI features Provider Provider Provider supports low-level features only Fabric Services

OFI DEVELOPMENT STATUS Application App uses OFI features App optimizes based on supported features Many apps Few apps libfabric OFI-provider gap Common optimization for all apps/providers Provider Provider’s choice Provider optimizes for OFI features Provider supports low-level features only Fabric Services 6

OFI LIBFABRIC COMMUNITY Because of the OFI-provider gap, not all apps work with all providers Intel® MPI Library MPICH Netmod/CH4 Open MPI MTL/BTL Open MPI SHMEM GASNet Sandia SHMEM * Clang UPC rsocket ES-API libfabric Enabled Middleware libfabric Control Services Communication Services Completion Services Data Transfer Services Discovery Connection Management Event Queues Message Queue RMA fi_info Address Vectors Event Counters Tag Matching Atomics Sockets TCP, UDP Verbs Cisco usNIC * Intel OPA PSM ® Cray GNI * Mellanox MXM * IBM Blue Gene * A3Cube RONNIE * supported experimental * Other names and brands may be claimed as the property of others

LIBFABRIC SCALABILITY Blue Gene / Q Developed to evaluate the Aurora software stack at scale and assist applications in the transition from Mira to Aurora By Courtesy Argonne* National Laboratory, CC BY 2.0, https://commons.wikimedia.org/w/index.php?curid=24653857 Native provider implementation that directly uses the Blue Gene/Q hardware and network interfaces for communication * Other names and brands may be claimed as the property of others

LIBFABRIC SCALABILITY Blue Gene / Q LIBFABRIC SCALABILITY PAMI and libfabric performance Completely subjective software stack comparison IBM* MPICH / PAMI IBM XL C compiler for BG, v12.1 Optimized for single-threaded latency …/comm/xl.legacy.ndebug/bin/mpicc v1r2m2 MPICH / CH4 / libfabric gcc 4.4.7 global locks, inline, direct, etc. Provider not optimized for performance MPICH MPICH PAMID CH4 OFI PAMI vs libfabric BG/Q Provider hardware 32 nodes on ALCF Vesta machine

LIBFABRIC SCALABILITY Blue Gene / Q LIBFABRIC SCALABILITY OSU* MPI Performance Tests v5.0 MPI scale out testing: - cpi – 1M ranks, - ISx benchmark – 0.5M ranks Tests document performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult other sources of information to evaluate performance as you consider your purchase.  For more complete information about performance and benchmark results, visit http://www.intel.com/performance. * Other names and brands may be claimed as the property of others

LIBFABRIC SCALABILITY CRAY XC40 SHMEM Evaluate libfabric SHMEM performance on high-performance interconnect Computing Sciences Lawrence Berkeley National Laboratory Provider implementation that uses the Cray* uGNI hardware and network interface for communication * Other names and brands may be claimed as the property of others

LIBFABRIC SCALABILITY CRAY XC40 LIBFABRIC SCALABILITY SHMEM 1630 nodes on Cray* XC40 (Cori) Cray* SHMEM Cray* Aries, Dragonfly* topology CLE (Cray* Linux*), SLURM* DMAPP Designed for PGAS Optimized for small messages Sandia* OpenSHMEM / libfabric uGNI Designed for MPI and PGAS Optimized for large messages https://www.nersc.gov/users/computational-systems/cori/configuration Cray SHMEM Open SHMEM OFI libfabric vs DMAPP uGNI Aries Interconnect * Other names and brands may be claimed as the property of others

LIBFABRIC SCALABILITY CRAY XC40 LIBFABRIC SCALABILITY SHMEM Blocking Get/Put B/W Put – up to 61% improvement Get – within 2% Tests document performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult other sources of information to evaluate performance as you consider your purchase.  For more complete information about performance and benchmark results, visit http://www.intel.com/performance. * Other names and brands may be claimed as the property of others

LIBFABRIC SCALABILITY CRAY XC40 LIBFABRIC SCALABILITY SHMEM NAS ISx (Integer Sort) weak scaling GUPS Scaling slight improvement (lower is better) Improved scalability XPMEM Tests document performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult other sources of information to evaluate performance as you consider your purchase.  For more complete information about performance and benchmark results, visit http://www.intel.com/performance. * Other names and brands may be claimed as the property of others

ADDRESSING THE OFI-PROVIDER GAP libfabric API Libfabric Framework Utility Provider Interface ‘extensions’ – for consistency Provider Services Logging Environment variables Assist in provider development Components templates, lists, rbtree, hash table, free pool, ring buffer, stack, … Enhance core provider Base Class Implementations fabric, domain, EQ, wait sets, AV, CQ, … SHM primitives Core Provider

Performance is a primary objective UTILITY PROVIDER Performance is a primary objective

MOVING FORWARD Sockets – TCP/UDP NetworkDirect Analyze requests to expand OFI community Beyond Linux* Enterprise, Cloud, Storage (NVM) Beyond HPC Stronger engagement with these communities * Other names and brands may be claimed as the property of others

TARGET SCHEDULE 2016 Q2 Q3 Q4 2017 Q2 Q3 Q4 RDM over DGRAM Util RDM over MSG Util Utility provider is ongoing Shared Memory New Core Providers Driven by implementation feedback Improve error handling, flow control Better support for non-traditional fabrics Optimize completion handling Address deferred features Traditional and non-traditional RDMA providers ABI 1.1

SUMMARY OFIWG development model working well OFI is so good OFIWG development model working well Interest in OFI and libfabric is high Growing community Significant effort being made to simplify the lives of developers Applications and providers

LEGAL DISCLAIMER & OPTIMIZATION NOTICE No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document. Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade. This document contains information on products, services and/or processes in development.  All information provided here is subject to change without notice. Contact your Intel representative to obtain the latest forecast, schedule, specifications and roadmaps. The products and services described may contain defects or errors known as errata which may cause deviations from published specifications. Current characterized errata are available on request. Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. Copyright © 2016, Intel Corporation. All rights reserved. Intel, Pentium, Xeon, Xeon Phi, Core, VTune, Cilk, and the Intel logo are trademarks of Intel Corporation in the U.S. and other countries. *Other names and brands may be claimed as the property of others Optimization Notice Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804

Thank you for your time! Sean Hefty sean.hefty@intel.com www.intel.com/hpcdevcon