Prepared by Kenan BOZDAŞ

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Presentation transcript:

Prepared by Kenan BOZDAŞ ELE413 8085 Instruction Set Prepared by Kenan BOZDAŞ 28.10.2008

Contents Registers Addressing Modes Instruction Set Classification Deeper look at instructions

Registers Accumulator(A) & Processor Status Word (PSW,Flag Register) B & C (BC) D & E (DE) H & L (HL, M) Stack Pointer (SP) Program Counter (PC)

Registers Accumulator Destination for all Arithmetic & Logical operations Dest & Source for IN & OUT instructions

Registers Flag Register (PSW) Flow control Status control Cannot access bits S Z AC P CY

Registers B, C, D, E Can be used as an 8-bit register Or in pairs: B & C (BC) D & E (DE)

Registers H, L Can be used as an 8-bit register Or in pairs: H & L (HL) Or as a memory pointer (M)

Registers SP, PC Stack pointer is used in stack operations. Program counter contains the address of the instruction to be executed.

Addressing Modes Immediate Addressing Register Addressing Direct Addressing Indirect Addressing

Addressing Modes Immediate Addressing Data is present in the instruction. MVI R,data (8-bit) LXI R-R,data (16-bit)

Addressing Modes Register Addressing Data is provided through the registers. MOV Rd,Rs

Addressing Modes Direct Addressing I/O instructions IN 01H OUT 21H Address is given in the instruction CALL 2000H STA 0FF00H

Addressing Modes Indirect Addressing Effective address is calculated by the processor DCR M [HL]=[HL]-1 LDAX B A=[BC]

Instruction Set Classification Data Transfer (Copy) Operations Arithmetic Operations Logical Operations Branching Operations Machine Control Operations

Instruction Set Classification Data Transfer(Copy) Operations Between Registers MOV D,L Specific data byte to a register or a memory location MVI C,0FAH MVI M,00H Between a memory location and a register MOV M,L Between an I/O device and the accumulator IN 21H

Instruction Set Classification Arithmetic Operations Addition ADD R A=A+R ADI 03H A=A+3H Subtraction SUB R A=A-R SUI 15H A=A-15H Increment/Decrement INR A DCX H

Instruction Set Classification Logical Operations AND, OR, XOR ANA R A=A&R XRA M A=A M Rotate RAL RRC Compare CMP R Complement CMA

Instruction Set Classification Branching Operations Jump JMP addr unconditional JNZ addr conditional CALL CALL addr unconditional CC addr conditional Return

Instruction Set Classification Machine Control Operations Halt, Interrupt, Do nothing HLT EI NOP

Deeper look at instructions MOV R,R MOV R,M MOV M,R MOV M,M (Single Memory Pointer) MVI R,imm MVI M,imm MVI [addr],imm (Only via memory pointer)

Deeper look at instructions LXI B, 16-bit imm. BC=16-bit imm. LXI D, 16-bit imm. DE=16-bit imm. LXI H, 16-bit imm. HL=16-bit imm. LXI SP,16-bit imm. SP=16-bit imm. LHLD 16-bit imm. HL=[16-bit imm.] SHLD 16-bit imm. [16-bit imm.]=HL

Deeper look at instructions LDA 16-bit addr LDAX B (BC) LDAX D (DE) LDAX H (HL) (Already have MOV A,M) STA 16-bit addr .. STAX H (Already have MOV M,A)

Deeper look at instructions INR/DCR R R=R±1, CY not altered INR/DCR M [HL]=[HL] ±1, H nor L altered INX/DCX Rp Rp=Rp ±1, no flags altered DAD Rp HL=HL+Rp only CY affected DAA Decimal Adjust not Conversion

Deeper look at instructions ADD R A=A+R ADC R A=A+R+CY ADD M A=A+[HL] ADC M A=A+[HL]+CY ADI imm. A=A+ 8-bit imm. ACI imm A=A+imm.+CY SUB R A=A-R SBB R A=A-R-CY SUB M A=A-[HL] SBB M A=A-[HL]-CY SUI imm. A=A- 8-bit imm. SBI imm A=A-imm.-CY

Deeper look at instructions ANA R A=A&R ANA M A=A&[HL]=A&M ANI imm. A=A& 8-bit imm. ORA R A=A||R ORA M A=A||[HL]=A&M ORI imm. A=A|| 8-bit imm. XRA R A=A R XRA M A=A [HL]=A&M XRI imm. A=A 8-bit imm.

Deeper look at instructions CMA complement accumulator (B,C,D,E..) CMC complement carry STC set carry RLC rotate A left, CY not included RRC rotate A rigth, CY not included RAL rotate A left through CY RAR rotate A right through CY

Deeper look at instructions CMP R or M CPI imm. CY Z A<R or M A<imm. 1 A=R or M A=imm. A>R or M A>imm.

Deeper look at instructions JMP 16-bit addr. PC=16-bit addr JC/JNC 16-bit addr. JZ/JNZ 16-bit addr. JM/JP 16-bit addr. JPE/JPO 16-bit addr. PCHL PC=[HL] XCHG DE=HL, HL=DE not [] XTHL TOS=HL, HL=TOS

Deeper look at instructions CALL 16-bit addr. PC=16-bit addr,push stack CC/CNC 16-bit addr. CZ/CNZ 16-bit addr. CM/CP 16-bit addr. CPE/CPO 16-bit addr.

Deeper look at instructions RET PC=16-bit addr, pop stack RC/RNC RZ/RNZ RM/RP RPE/RPO

Deeper look at instructions Addr FF01H 21 ;LXI H,0100H FF02H 00 FF03H 01 FF04H 3E ; MVI A,0C9H FF05H C9 FF06H 2B ;LOOP: DCX H FF07H C2 ;JNZ LOOP FF08H 06 FF09H FF FF0AH 76 ;HLT (RST 7)