Serial versus Parallel Data Transfers

Slides:

Advertisements

Similar presentations

EXTERNAL COMMUNICATIONS DESIGNING AN EXTERNAL 3 BYTE INTERFACE Mark Neil - Microprocessor Course 1 External Memory & I/O.

Advertisements

ECE 371 Unit 13 - Part 1 Serial Peripheral Interface (SPI)

1 Sequential Circuits Dr. Pang. 2 Outline Introduction to sequential circuits Basic latch Gated SR latch and gated D latch D flip-flop, T flip-flop, JK.

LOGIC GATES ADDERS FLIP-FLOPS REGISTERS Digital Electronics Mark Neil - Microprocessor Course 1.

SHIFT REGISTERS: CONVERTING BETWEEN SERIAL AND PARALLEL DATA Mark Neil - Microprocessor Course 1 Serial versus Parallel Data Transfers.

Interface circuits I/O interface consists of the circuitry required to connect an I/O device to a computer bus. Side of the interface which connects to.

A.Abhari CPS2131 Registers A register is a group of n flip-flops each of them capable of storing one bit of information There are two types of registers:

Last Mod: March 2014  Paul R. Godin Shift Registers Registers 1.1.

Integrated Circuits. Integrated Circuit (IC) A silicon crystal (chip) containing electronic components that create the logic gates we’ve been looking.

1 Registers and Counters A register consists of a group of flip-flops and gates that affect their transition. An n-bit register consists of n-bit flip-flops.

Dr. Rabie A. Ramadan Al-Azhar University Lecture 6

 8251A is a USART (Universal Synchronous Asynchronous Receiver Transmitter) for serial data communication.  Programmable peripheral designed for synchronous.

7-6 단일 레지스터에서 Microoperation Multiplexer-Based Transfer  Register 가 서로 다른 시간에 둘 이상의 source 에서 data 를 받을 경우 If (K1=1) then (R0 ←R1) else if (K2=1) then.

ENG241 Digital Design Week #8 Registers and Counters.

Integrated Circuits. Integrated Circuit (IC) A silicon crystal (chip) containing electronic components that create the logic gates we’ve been looking.

ELE22MIC Lecture 9 MULTIPLEXOR - DATA SELECTOR DEMULTIPLEXOR - DATA DISTRIBUTOR Parallel to Serial Data Conversion External Address Bus Latching Address.

Registers Page 1. Page 2 What is a Register?  A Register is a collection of flip-flops with some common function or characteristic  Control signals.

Computer Architecture and Organization Unit -1. Digital Logic Circuits – Logic Gates – Boolean Algebra – Map Simplification – Combinational Circuits –

Last Mod: Jan 2015  Paul R. Godin Shift Registers : Technician Series Registers 1.1.

Digital Fundamentals Tenth Edition Floyd Chapter 9.

D Flip Flop. Also called: Delay FF Data FF D-type Latches ‘Delayed 1 Clock Pulse’

SHIFT REGISTERS: CONVERTING BETWEEN SERIAL AND PARALLEL DATA Mark Neil - Microprocessor Course 1 Serial versus Parallel Data Transfers.

REGISTER TRANSFER LANGUAGE (RTL) INTRODUCTION TO REGISTER Registers1.

EEL 5666: IMDL Sensor Report. Sensor Report: Introduction Sensor Suite Bump Sensor IR Sensors Optical Mice.

1 Registers A register is a group of n flip-flops each of them capable of storing one bit of information There are two types of registers: parallel and.

Chapter 35 Sequential Logic Circuits. Objectives After completing this chapter, you will be able to: –Describe the function of a flip-flop –Identify the.

CSE 260 Digital Logic Design Registers, Memory BRAC University.

REGISTERS - Introduction to Registers Shift Registers Lecture 1 Gunjeet Kaur Dronacharya Group of Institutions.

Appendix C Basics of Logic Design. Appendix C — Logic Basic — 2 Logic Design Basics §4.2 Logic Design Conventions Objective: To understand how to build.

Principles & Applications

Class Exercise 1B.

Fundamentals of Computer Engineering

REGISTER TRANSFER LANGUAGE (RTL)

Registers and Counters

Electronics Technology

Digital Fundamentals Abdul Hameed

COMP2121: Microprocessors and Interfacing

Basics of digital systems

INTRODUCTION Overview of Shift Registers

3.2 Shift Register Basic shift register function

An Introduction to Microprocessors

ATmega103 Timer0 and Interrupts

Digital Logic Design Sequential Circuits (Chapter 6)

ECET 330 Innovative Education--snaptutorial.com

Digital to Analog Converters

Interfacing Memory Interfacing.

Tim Sumner, Imperial College, Rm: 1009, x47552

Instructor: Alexander Stoytchev

Serial Communication Interface

AT28C17 EEPROM By: Ethan Peterson.

Tim Sumner, Imperial College, Rm: 1009, x47552

Tim Sumner, Imperial College, Rm: 1009, x47552

ECE 3130 – Digital Electronics and Design

Lecture 17 Logistics Last lecture Today HW5 due on Wednesday

Principles & Applications

Decoding and Using a 4x4 Keyboard

Switching Theory and Logic Design Chapter 5:

14 Digital Systems.

Lecture 17 Logistics Last lecture Today HW5 due on Wednesday

Device Drivers – Digital Voltmeter

Registers and Counters

Instructor: Alexander Stoytchev

Registers Today we’ll see some common sequential devices: counters and registers. They’re good examples of sequential analysis and design. They are also.

ECE 352 Digital System Fundamentals

Week 11 Flip flop & Latches.

An Introduction to Microprocessors

Costas Foudas, Imperial College, Rm: 508, x47590

Decoding and Using a 4x4 Keyboard

Presentation transcript:

Serial versus Parallel Data Transfers OUTLINE: Shift Registers Converting data from Serial  Parallel 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

Tim Sumner, Imperial College, Rm: 1009, x47552 Shift Registers Shift Registers convert numbers expressed in terms of several bits (many signal lines) into a stream of 0, 1 and a Clock. Advantage: A convenient way to reduce the number of Electrical signal lines by factors of 8, 16, 32, 64. Disadvantage: For the same transfer rate the electronics must be faster by factors of 8, 16, 32, 64. 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

What do Shift Registers Do ? $AA D7 H D6 L D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 H L 4 DFF Data_in Data_out Set Up Clock Set Up Set Up Set Up 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

Tim Sumner, Imperial College, Rm: 1009, x47552 Suppose you feed an ‘1’: D0 D1 D2 D3 D4 D5 D6 D7 1 T 2T 3T 4T 5T 6T 7T 8T 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

Tim Sumner, Imperial College, Rm: 1009, x47552 The 74HC165 Shift Register Serial Data In Serial Data Out 8-bit Word Clock *Load 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

Tim Sumner, Imperial College, Rm: 1009, x47552 The 74HC165 data 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

Tim Sumner, Imperial College, Rm: 1009, x47552 The 74HC164 Shift Register Serial Data In Parallel out Clock *Load 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

Parallel becomes Serial High Level Design Parallel becomes Serial We want to construct : 8-Bits of data (Parallel) ATmega103 Board Shift Register 74HC165 Serial Data PORTB Clock Shift/*Load Shift Register 74HC164 PORTC Serial to Parallel Clock 8-Bits of data (Parallel) 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

Tim Sumner, Imperial College, Rm: 1009, x47552 Low Level Design 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

The Memory Test Program Start Shift 8 times Select new pattern Clock the 165 using PORTC Delay several seconds Look at the LEDs 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

Tim Sumner, Imperial College, Rm: 1009, x47552 Task Plan: Construct a device that will turn 8-bit parallel data from Port-B to serial data + clock . (2) Construct a device that will receive serial data, convert them to parallel data and display them using LEDs. (3) Write a program that will send several patterns down your ‘serial link’ and demonstrate that it works. 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

For more motivated students: You can attempt storing your data in a register at the end before sending them to the LEDs. This will require knowledge on how a register really works Next few slides describe the 75HC574 register with 3-state outputs. 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

Guess what is the 1 Byte memory ? It exists in one package : E DAT-7 Q-7       74F574 Byte coming in Byte Stored Q-0 DAT-0 CLK 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

Tim Sumner, Imperial College, Rm: 1009, x47552 The data sheets of the 74F574 Register 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

Tim Sumner, Imperial College, Rm: 1009, x47552 What does the 74F574 do ? The outputs of the 574 are tri-state : They Can be high ‘1’, low ‘0’, and DISCONNECTED (HIGH IMPEDANCE STATE). 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

Tim Sumner, Imperial College, Rm: 1009, x47552 The 74F574 Truth Table 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

The Data Sheets of the 74F574 I Register ts C2 DataIn tPZH EN1 DataOut Ts = setup time tPZH = Output Enable time 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

The Data Sheets of the 74F574 II C2 DataIn EN1 DataOut tp Tp = propagation delay 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552

Tim Sumner, Imperial College, Rm: 1009, x47552 Task II: Construct the following circuit: Make sure that after clocking the serial data eight times you also clock the data in to the register. 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552