Tim Green, MGTS Precision Op Amp Applications Manager January 10, 2018 OPA2544 Bridge Circuit Tim Green, MGTS Precision Op Amp Applications Manager January 10, 2018

Summary A) Power op amp circuits have several design considerations: Thermal Design (heatsink, etc.) Power Dissipation Electrical Overstress from real world loads Stability when driving cap loads Small signal BW and slew rate limited large signal BW B) OPA2544 Bridge circuit is analyzed to drive 10uF to 100uF cap loads and be stable. Large signal slew rate limitations must be considered when trying to drive the load at frequency. Slew rate across the bridge tied load is doubled from the slew rate out of either op amp. If slewing fast into cap loads current requirements must be analyzed. For each op amp output: Slew Rate = 2*pi*f*Vout_peak. C) For more detailed design help use the resources sighted at the end of this presentation. D) This presentation focuses on stabilizing the op amps to drive 10uF to 100uF load. The resulting closed loop small signal BW = 1.4kHz. E) To minimize power dissipation use supplies as low as possible to yield maximum desired output swing. F) Final PCB built design should confirm stability by a closed loop, small signal, transient stability test. Note: All TINA-TI simulations can be run on the embedded schematics in this presentation by downloading the free TI SPICE simulator, TINA-TI, at: http://www.ti.com/tool/tina-ti

Final Circuit

OPA2544 Bridge Circuit Stability Analysis

Master Loop – No Comp

Master Loop – No Comp, Modify 1/Beta for Stability

Master Loop – Final Comp Since Master and Slave Op Amp are symmetrical relative to cap load, we will compensate Slave the same as Master and check for loop gain stability on each.

Master Loop – Final Comp Loop Gain Phase Margin (10uF) = 123 degrees Loop Gain Phase Margin (100uF) = 176 degrees

Slave Loop – Final Comp Since Master and Slave Op Amp are symmetrical relative to cap load, we will compensate Slave the same as Master and check for loop gain stability on each.

Slave Loop – Final Comp Loop Gain Phase Margin (10uF) = 124 degrees

Closed Loop BW

Closed Loop BW

Key Design Resources https://e2e.ti.com/support/amplifiers/precision_amplifiers/w/design_notes Download all parts of the following presentations: