A Procedure and Program to Optimize Shuttle Mask Cost Advantage

Slides:



Advertisements
Similar presentations
Design Rule Generation for Interconnect Matching Andrew B. Kahng and Rasit Onur Topaloglu {abk | rtopalog University of California, San Diego.
Advertisements

Energy Efficiency through Burstiness Athanasios E. Papathanasiou and Michael L. Scott University of Rochester, Computer Science Department Rochester, NY.
SOFTWARE TESTING. INTRODUCTION  Software Testing is the process of executing a program or system with the intent of finding errors.  It involves any.
Waiving Known DRC Violations from Layout IP
Key-word Driven Automation Framework Shiva Kumar Soumya Dalvi May 25, 2007.
Information Means The World.. Enhanced Data Recovery Agenda EDR defined Backup to Disk (DDT) Tape Emulation (Tape Virtualization) Point-in-time Copy Replication.
WaferReticle Project Yield-Driven Multi-Project Reticle Design and Wafer Dicing Andrew B. Kahng 1, Ion Mandoiu 2, Xu Xu 1, and Alex Z. Zelikovsky 3 1.
1 User Interface Design CIS 375 Bruce R. Maxim UM-Dearborn.
Uniform Coding and Simplified Pricing HEALTH AUTHORITY – ABU DHABI Health Systems Finance May, 2007.
Christopher E. Naujok, P.E., CEP, CSWP Optimizing SolidWorks through Standards.
Modeling and simulation of systems Simulation optimization and example of its usage in flexible production system control.
SIGCOMM 2002 New Directions in Traffic Measurement and Accounting Focusing on the Elephants, Ignoring the Mice Cristian Estan and George Varghese University.
CAD for Physical Design of VLSI Circuits
ITRS Factory Integration Difficult Challenges Last Updated: 30 May 2003.
Using Neural Networks to Predict Claim Duration in the Presence of Right Censoring and Covariates David Speights Senior Research Statistician HNC Insurance.
© Wiley 2007 Chapter 10 Facility Layout. © Wiley 2007 OUTLINE What Is Layout Planning? Types of Layouts Designing Process Layouts Special Cases of Process.
SE: CHAPTER 7 Writing The Program
Computer Aided Process Planning (CAPP). What is Process Planning? Process planning acts as a bridge between design and manufacturing by translating design.
Optimizing Shipping Times Using Fractional Factorial Designs Steven Walfish June 6, 2002.
How to Improve the Safety of Signalling Systems with a Shortened Construction Period in Engineering Construction Projects Gao Guoliang Safety Assurance.
Distributed Information Systems. Motivation ● To understand the problems that Web services try to solve it is helpful to understand how distributed information.
Outline The role of information What is information? Different types of information Controlling information.
"Using Simulation with Scheduling Visualization to evaluate Change Initiatives in a Bio-Pharma Environment”
Behavior Control of Virtual Vehicle
Operations Fall 2015 Bruce Duggan Providence University College.
Cluster Consistency Monitor. Why use a cluster consistency monitoring tool? A Cluster is by definition a setup of configurations to maintain the operation.
7 Strategies for Extracting, Transforming, and Loading.
Processor Structure and Function Chapter8:. CPU Structure  CPU must:  Fetch instructions –Read instruction from memory  Interpret instructions –Instruction.
Software Quality Assurance and Testing Fazal Rehman Shamil.
Part 3.
July 11, 2016 Run-to-Run Control of Linewidth and Overlay in Semiconductor Manufacturing Christopher Allen Bode Dr. Thomas F. Edgar, Advisor University.
Manufacturing Processes
Definition: The physical positioning of processes, departments, equipment and work areas to optimize an organization’s effectiveness in achieving its operating.
Artificial Intelligence In Power System Author Doshi Pratik H.Darakh Bharat P.
EMT 351/4 DIGITAL IC DESIGN Week # 1 EDA & HDL.
A Predictive Maintenance Strategy based on Real-Time Systems
Software Development.
The Revolution of Just-In-Time (JIT) and Lean Manufacturing
HP SmartStream Production Center
Overview Modern chip designs have multiple IP components with different process, voltage, temperature sensitivities Optimizing mix to different customer.
Recipes for Use With Thin Clients
Introduction Edited by Enas Naffar using the following textbooks: - A concise introduction to Software Engineering - Software Engineering for students-
Software Testing.
UNIT-III Operations Management PREPARED BY CH. AVINASH.
THIS IS TO EVIDENCE YOUR WORK AND GET THE BEST GRADE POSSIBLE
Applying Control Theory to Stream Processing Systems
Rule Induction for Classification Using
Cellular Layouts Cellular Production Group Technology
Chapter 8 – Software Testing
Lecture 9- Design Concepts and Principles
Work-in-Progress: Wireless Network Reconfiguration for Control Systems
The Revolution of Just-In-Time (JIT) and Lean Manufacturing
Entry-Task-Validation-Exit (ETVX)
Introduction Edited by Enas Naffar using the following textbooks: - A concise introduction to Software Engineering - Software Engineering for students-
Computer Programming.
A Test Bed for Manufacturing Planning and Scheduling Discussion of Design Principles Sept Claude Le Pape Director R&D Manufacturing Planning and.
FACILITY LAYOUT Facility layout means:
Matlab as a Development Environment for FPGA Design
Lecture 9- Design Concepts and Principles
CPU SCHEDULING.
An Introduction to Software Architecture
International Defence Enterprise Architecture Specification (IDEAS)
Knowing When to Stop: An Examination of Methods to Minimize the False Negative Risk of Automated Abort Triggers RAM XI Training Summit October 2018 Patrick.
Pattern Classification All materials in these slides were taken from Pattern Classification (2nd ed) by R. O. Duda, P. E. Hart and D. G. Stork, John.
AIMS Equipment & Automation monitoring solution
Small-Scale Projects Under JI
Presented By: Darlene Banta
Data Warehousing Concepts
Software Testing.
Presentation transcript:

A Procedure and Program to Optimize Shuttle Mask Cost Advantage Artur Balasinski 1) , J.Cetin1), W.Sachs-Baker1) A.Kahng2), and X.Xu2) 1) Cypress Semiconductor 2) University of California San Diego, CA, USA

Introduction Shuttle or Multi-IP masks: A well-known recipe for reducing cost of mask component in new product development. Simple concept, complex execution: put multiple types of layers or products on one mask plate process options have to be considered. Immediate verification required: Once the first mask is shipped, it is costly to change architecture of the set. Visual verification fast and efficient Simple algorithm: mask layers lined up according to the price and field tone subsequent layers placed on the masks with different grades. Verification and enhancements: layer pairing based not only on the price of the mask set, but also on the cost of the setup, design, and fab-friendliness. Manual pairing reduce the count of orphan layers matching rules to improve flexibility and fab-friendly architecture. 11/23/2018

Why Are We Optimizing ? IP distribution: mask databases by layer and product can have different shapes, sizes, mask grade requirements Optimization needed to put as many non-redundant IP components on one plate as possible Two basic flavors: Multi-layer (NL-1P) Multi-Product (1L-MP) Mixtures also possible Gets complicated for 30 masks per product Mask 1 High end Starting layer set Mask 2 Low end Starting product set 11/23/2018

What Are We Optimizing ? Not mask cost because mask cost [$] = const IP placement cost: what is the min cost of reticles to transfer layout pattern to wafer, for one product for a product family multiple IP needed at the same time/plate to share placement cost IP density on a mask: Examples: Simple: 1 Product with N layers (1P-NL) on one mask: IPD = N (no orphans !) M Products with 1 layer (1L-MP) on one mask: IPD = M (same flow !) Real life: M products with total of n1+n2+…nm layers on K masks: IPD = (n1+n2+…nm)/ K Why real life is complicated: IP placement for testchips costs more than for products 11/23/2018

What Are We Optimizing ? The higher the IPD, the lower the mask component cost, but Mask cost is not the only one in the overall product development cost 11/23/2018

cost may increase with IPD How Are We Optimizing ? Optimizing cost of IP placement: Increase IPD until something breaks Multi-component cost criteria: First derivative: Manufacturing Setup Design cost may increase with IPD Placement cost decreases with IPD Question: Can cost reduction only depend on automated layer placement 11/23/2018

What can increase with IPD ? Setup, Design, and Manufacturing cost single-event distributed As IPD increases: Manufacturing cost up predictable - low volume as mitigation unpredictable - fab conditions Setup cost often not included database handling frame planning quality procedures archiving Design cost: shuttle delays volume production wasted effort for unproven products What this means: Full visibility on shuttle impact desired upfront 11/23/2018

Example Low IPD Mask cost dominates Other components catch up after multiple weeks High IPD Design cost dominates Mask cost distributed Other cost increased due to higher complexity 11/23/2018

Different ramp rate: use high IPD masks for short time only Cumulative Cost Low IPD Total cost similar for low and high IPD Different ramp rate: use high IPD masks for short time only High IPD 11/23/2018

Basic Algorithm for NL-1P How do we arrange layers on a mask plate ? Step 1: Decision making Do we want this product to run in mulit-layer format ? With how many layers per plate ? Output: N = number of layers per plate 11/23/2018

Basic Algorithm for NL-1P Step 2: Execution Guidelines: - Design feedback - Product volume 11/23/2018

Input GUI Input parameters: - Mask making restrictions - Scribe entries - Number of LPP - Reticle data (to be loaded) Hint: For best results, have a picture ! 11/23/2018

Reticle Grade A1, Cost 29,000, Process 193-PSM-ARP Output GUI 1 Simple example for 3 products with identical die sizes Picture: Layer name, blading, scribe to scale Price incentive displayed 1 Picture = 10000 Words Reticle Grade A1, Cost 29,000, Process 193-PSM-ARP 11/23/2018

Output GUI 2 Mfg verification: 1. Number of exposures must not reduce stepper’s throughput 2. Other issues related to too frequent stepping must be avoided 11/23/2018

Manual Optimization Layer placement procedure: good for majority of the layers may not be optimal from the MFG, SET or DES standpoint enhancements, limitations and additional rules for the layer placement: layers with similar functions should be placed on one reticle, to enable single mask retapeout for design fixes, non-critical layers OK with the critical ones even if their characteristics, e.g., field tone, are different. The exact guidelines provided by the maskshop, layers with similar pattern densities should be placed on the same reticle, individual layers from different products need large footprint so as not to reduce fab throughput. Should provide data placement document. These rules may not lend themselves to easy automation. While the basic layer combinations call for price-dependent layer pairing, this may not always be the best solution for product development. 11/23/2018

Unlimited placement required Any combination of masks and layers Theoretical Case Unlimited placement required Any combination of masks and layers 11/23/2018

Conclusions Shuttle automation is making significant progress to optimize placement of multiple products on the masks. One consequence is complex data structure which impacts design and manufacturability. Layer placement needs automated rules and manual verification to minimize the number of orphans and make the set manufacturing-friendly at the same time. Algorithmic solutions aimed only at reduction of the mask cost may not provide optimal mask composition, due to many factors in the multi-parameter, integrated cost equation: setup, product line, risk of error and lost opportunity. We developed and demonstrated the automated layer placement routine which can be useful in optimization of new product development. 11/23/2018