DAC39J84 POWER SUPPLY/ PHASE NOISE MEASUREMENTS

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Presentation transcript:

DAC39J84 POWER SUPPLY/ PHASE NOISE MEASUREMENTS 01-18-2017 Mandeep Singh

SETUP Assuming 8X Interpolation DAC Output Rate: 2560 MSPS Mixer Block Enabled Constant Input Value: 0x7FFF 2560MHz Input clock Power Measurement Settings JESD204B is Off Internal PLL Off DAC B, C and D are Off NCO Enabled QMC On

Current Measurements (A) Frequency (MHz) Power Rails 0.9V (VDIG, VDDT, VDDDA, VDDCLK) 1.8V (APLL, VDDR, VQPS, AREF, VDIO) 3.3V (ADAC, 3.3VCLK) 310 0.451 0.034 0.461 412.5 0.463 0.036 510 0.459 0.037 612.5 0.460 0.039 710 0.040 810 0.041

Fout at 310 MHz

Fout at 412.5 MHz

Fout at 510 MHz

Fout at 612.5 MHz

Fout at 710 MHz

Fout at 810 MHz