Errors due to process variations Deterministic error within a die Characterized a priori Over etching, vicinity effects, … A priori unknown Gradient errors due to thermal, potential, stress, … Random errors Intrinsic randomness in materials Use better materials, use large area for averaging Randomness in processes Use better processes, use large area for averaging Randomness during operation Use differential signaling, shielding, isolation, etc

L

Various Capacitor Errors

Common error reduction techniques Use large area to reduce random errors Common Centroid layout to reduce linear gradient errors Use unit element arrays to improve matching Interdigitate for matching against gradients Use of symmetry or photolithographic invariance Controlled edge or corner effects Dummy devices for similar vicinity Guard rings for isolation Careful floor planning

Unknown magnitude and direction Gradient errors: Linear gradient Higher order gradient Unknown magnitude and direction Common centroid cancels linear gradient errors, but not nonlinear gradient errors nor local random errors Common centroid

Edge effects Edge control  better

Better A-B matching Vicinity control

Capacitor layout example

Are there any thing else you can improve? Is there full symmetry between C1 and C2?

Resistor layout example

OK for really non-critical resistors. Accuracy is quite poor. Should use unit cell arrays for improved accuracy.

Positives: use of dummy, use of unit cells, intedigitized, outfold jumps Negatives: fold-in jumps, centroids not co-incidental Improvements: ???

Transistor layout example

Layout of a differential pair Which layout is a better implementation of the differential pair? (b) or (c) or (d)?

Tilted implant beam causes asymmetry Aligned gate Parallel gate PLI? PLI

Parallel gate can be PLI Aligned gate can benefit from symmetry Add dummy metal metal Dummy makes it symmetric Asymmetric

Can have both gate alignment and symmetry But still suffers from gradient errors

This pattern cancels gradient M2 M1 M2 M1 Can it be made more compact?

This pattern cancels gradient M2 M1 M2 M1 This one does.

Does the layout of M1 and M2 have common centroids? Does the layout have symmetry? Does it have PLI?

Avoiding the Antenna Effect Long metal acts as antenna to collect charges that may destroy gates: Break the antenna by going to a different layer:

Reference distribution Converted Iref to Vref to be shared Vulnerable to voltage drops in ground lines

Reference distribution Distribute Iref over longer distances is more robust

Routing long interconnects Parasitic capacitors or even inductors between parallel metal lines Parasitic caps between crossing metal lines

Differential signaling to reduce parasitic coupling effects

Shield or guard critical lines Larger spacing reduces coupling

Example shielding scheme Critical signals shielded

Substrate Coupling Distributed substrate network model Digital activities couple to analog part through substrate coupling

Nearby devices affect each other through effect on Vth change Effect is worse at very high speed Example effect:

Techniques for reducing coupling Use differential circuit Distribute digital signals in complementary Critical circuit in “quiet area”, far away from noisy (digital) circuit Devices in a well are less sensitive Use trenches for isolation Critical circuit inside guard ring Critical operations in “quiet time”

Example use of guard ring

Introduction Theorem: If only linear gradient effects are present, then the mismatch of a parameter f of two elements will vanish if a common centroid layout is used. Common Centroid Layout Gradient Direction

Introduction A B B A Common Centroid Layout with Nonlinear Gradient Hypothesis of common-centroid theorem are not satisfied and

Introduction A B B A Common Centroid Layout with Nonlinear Gradient Are there any simple layout strategies that will also cancel nonlinear gradients?

Objective Develop a layout strategy for canceling mismatch of parameters for two matching-critical elements when nonlinear gradients of higher orders are present

Center-Symmetric Pattern Example 0-th order pattern P0: To generate 1st order pattern P1: take odd symmetry, that is, rotate about a point of symmetry point of symmetry Rotate 180deg

Center-Symmetric Pattern Example To generate 2nd order pattern P2: take even symmetry, that is, flip about one side Pattern P1 Pattern P2

Center-Symmetric Pattern Example To generate 3nd order pattern P3: take oddsymmetry, that is, rotate 180 deg about one point Pattern P2 Pattern P3

alternatively Pattern P2 Pattern P3

Center-Symmetric Pattern Example To generate 4th order pattern P4: take even symmetry, that is, flip about one line Pattern P3 Pattern P4

alternative Pattern P3 Pattern P4

2nd alternative Pattern P3 Pattern P4

5th order pattern

Alternative 5th order pattern

Center-Symmetric Patterns Many different center-symmetric layouts can be easily generated Different starting common-centroid circuits and different external rotation points will generate different structures

Property of Center-Symmetric Networks Theorem : A parameter f of a layout pattern of two elements that is center-symmetric of order n is insensitive to the kth-order gradients for

Gradient Modeling 1st order gradient Up to nth order gradient Let (x0,y0) be any reference point in the neighborhood of the matching critical devices 1st order gradient Up to nth order gradient

Gradient Effect Let (xA,yA) be any point in the neighborhood of the matching critical region It can be shown that fn(x,y) can be written as Moving the center of the nth order gradient will only introduce lower order components This argument can be repeated for gradient components of orders n-1, n-2, … 1

Simulation Results Totally 5 patterns are simulated 1st order 2nd order 4th order 5th order 3rd order

Highest Order of Gradient Effect Simulation Results Setup: Same total device area are assigned. Large gradient effects are artificially generated. Random variations are neglected. Mismatch (%) Highest Order of Gradient Effect 1st 2nd 3rd 4th 5th 2.77 5.22 7.43 10.39 0.24 0.87 1.70 0.01 0.068 0.0023 Pattern’s order

Test structure <0.002% systematic mismatch 3rd order central symmetry <0.04% systematic mismatch 2nd order central symmetry

Measurement results

Measurement results

Matching performance Conference papers: Journal papers: C. He, et al., ‘Nth order circular symmetry pattern and hexagonal tessellation: two new layout techniques canceling nonlinear gradient,’ ISCAS 2004 X. Dai, C. He, et al., ’an Nth order central symmetrical layout pattern for nonlinear gradients cancellation,’ ISCAS 2005 Journal papers: C. He, et al., ‘New layout strategies with improved matching performance,’ Analog integrated circuits and signal processing, vol. 49 , issue 3, pp 281-289,2006  

1 1 Binary matching 1 1

1 2 1 Binary matching 1 1 2 2 1 1 1 2 1 2 1 1 1 2 1 1 2 1 1 1 2

1 2 3 1 Binary matching 1 1 2 2 1 1 1 3 2 1 2 1 1 3 1 2 1 1 2 1 3 1 1 2

1 2 3 1 Binary matching 4 1 1 2 2 1 1 1 3 2 1 2 1 1 3 1 5 2 1 1 2 4 1 3 1 1 2

1 2 3 3-way match 2 1 2 3 2 3 1 3 1