Monitor memory space Address (Hex) Description (Each 24 bits) 0 Serr,mismatch,smt_id,seq_id,hdi_id,data (last data word read) 1 Serr error count – Serr bit high 2 mismatch in the seq-id or the HDI-id 3 zero error count – Zero byte not found 10 # of undefined data_type clusters 11 # of axial data_type clusters 12 # of stereo data_type clusters 13 # of Z-axis data_type clusters 20-28 Data activity on Chip(I)

Miscellaneous memory space The miscellaneous memory space constitutes of - 1. Bad channel: 32 X 64 – address : 0400 – 047F 2. Chip ranges : 24 X 1 – address : 0480 3. Pulse area thresholds:36 X 4 – address : 0500 – 0503 4. Miscellaneous parameters: 20 X 1 – SEQ_ID(8), HDI_ID(3),Disable bit(1), and Delay count (8). – address : 0580 5. Cluster threshold values: 17 X 4 – address : 0600 – 0603

Clustering algorithm

Clustering algorithm (continued..)

Hit filter Control Logic

Hit filter Control Logic (continued..)

Hit format Logic

Hit format Logic (continued..)

Approach 1 The synthesis tool was allowed to fit the design in minimum number of FPLDs Number of devices 5 Strip_reader_hitfilter_l3_schematic EPF10K200EGC599-1 Strip_reader_hitfilter_l3_schematic-1 Strip_reader_hitfilter_l3_schematic -2 EPF10K30ETC144-1 Strip_reader_hitfilter_l3_schematic-3 EPF10K30EQC208-1 Strip_reader_hitfilter_l3_schematic-4 EPF10K50EQC208-1 The synthesis tool mapped the design in five FPLDs such that the Embedded Array Blocks (EABs) were uniformly distributed but the major portion of the memory was set in the larger FPLDs. The FPLDs holding the memory had very small percentage of logic cells occupied.

Approach 2 The Hit Filter and L3 buffers are forced in one FPLD each and the synthesis tool is allowed to fit Strip Reader and Centroid Finder Number of devices 3 Hitfilter_schematic EPF10K100EBC356-1 L3_schematic EPF10K200EGC599-1 Strip_reader_hitfilter_l3- 1 EPF10K200SFC484-1 The synthesis tool tries to accommodate some of the excess logic, specially the memory of strip_reader_chip into the FPLD assigned to L3 buffer and very small fraction of it into FPLD assigned to Hit Filter and thus overall design fits into three FPLDs.

Approach 3 The Hit Filter and L3 buffers are forced to fit in one FPLD each and the Strip Reader with Centroid Finder is forced to fit in two FPLDs Number of devices 4 Strip_reader_chip – 1 EPF10K200EGC599-1 Strip_reader_chip -2 EPF10K130EFC484-1 Hitfilter_schematic EPF10K100EBC356-1 L3_schematic The strip reader needed two FPLDs because of the need of EABs for the memory blocks. Each memory block regardless of the memory requirement has minimum of two EABs,this is due to the word length more than 8 bits.

Approach 4 - The Hit Filter, L3 buffers and the Strip Reader with Centroid Finder are forced to fit in one FPLD each Number of devices 3 Hitfilter_schematic EPF10K200SBC356-1 L3_schematic EPF10K200EGC599-1 Strip_reader_schematic EPF10K200SFC484-1 The strip reader design now fits into one chip , because downloaded parameters do not use EABs