: XIO3130 We need to make the main board as small as possible, so that we don’t want to place XIO3130 on the main board. Main Board SoC (PCIe RC) PCIe Clock Buffer 8 differential CLK SW : XIO3130 SW SW SW SW SW SW SW SW SoC (PCIe EP) SoC (PCIe EP) SoC (PCIe EP) SoC (PCIe EP) SoC (PCIe EP) SoC (PCIe EP) SoC (PCIe EP) SoC (PCIe EP) Sub Board #1 Sub Board #2 Sub Board #3 Sub Board #4 Sub Board #5 Sub Board #6 Sub Board #7 Sub Board #8 The sub board is optional and the maximum number of the boards in system are eight. All sub board’s block need to be the same so that we are considering whether XIO3130 can be placed on each board and connect each other by daisy-chain.