Combinational Logic Design Process

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Combinational Logic Design Process Digital Electronics  Combinational Logic Design Process Digital Electronics © 2014 Project Lead The Way, Inc. Project Lead The Way, Inc. Copyright 2009

Combinational Logic Design Process Digital Electronics  Design Process Version #1 Word Problem Write Logic Expression Boolean Simplification AOI Logic Implementation Create Truth-Table NO Simplification Using Version #1 of the Combinational Logic Design Process, students will be able to design AOI based logic circuits from a given word problem. They will have the option to simplify the logic expression using Boolean algebra. Project Lead The Way, Inc. Copyright 2009

Combinational Logic Design Process Digital Electronics  Design Process Version #2 K-Mapping NOR Only Logic Implementation NAND Only Logic Implementation Word Problem Write Logic Expression Boolean Simplification AOI Logic Create Truth-Table NO Simplification Version #2 of the Combinational Logic Design Process adds two features to the design process. First, the students will be able to re-implement their AOI implementations into either NAND only or NOR only implementations, resulting in more efficient designs. Second, students will be able to utilize the Karnaugh mapping (K-Map) technique to simplify the logic expressions rather than using Boolean algebra. Project Lead The Way, Inc. Copyright 2009

Combinational Logic Design Process Digital Electronics  Design Process Version #3 K-Mapping NOR Only Logic Implementation Programmable Logic Word Problem Write Logic Expression Boolean Simplification AOI Logic Create Truth-Table NO Simplification NAND Only Logic Implementation Version #3 of the Combinational Logic Design Process adds Programming Logic to the design process. The Programmable Logic implementation can come from the AOI implementation or directly from the unsimplified Boolean expression. Project Lead The Way, Inc. Copyright 2009