Programmable Controller Basics Files And Programs MicroLogix Packaged Controllers 1

We are going to discuss... 1. What Are Program Files 2. Program File Functions 3. Ladder Logic Concepts 4. I/O Addressing 5. Logic 6. Examples

Memory Organization MicroLogix 1000 only DATA FILES MicroLogix 1000 1 2 3 4 5 6 7 Output File Input File Status File Bit File Timer File Counter File Control File Integer Files MicroLogix 1000 MEMORY PROGRAM FILES 1 2 3 4 5 6 - 15 System Reserved Main Program Error File HSC File STI File Subroutine Files MicroLogix 1000 only

Memory Organization MicroLogix 1000 only MicroLogix 1000 MEMORY PROGRAM FILES 1 2 3 4 5 6 - 15 System Reserved Main Program Error File HSC File STI File Subroutine Files MicroLogix 1000 only

File 0 - System File Dedicated & Reserved file Used to store various system related information. Processor type and configuration Communication parameters I/O configuration Passwords Misc...

File 1 - Reserved Future New enhancements New features New functionality

File 2 - Main Program Dedicated & Open file Main Ladder Program Typically is where the “main” user program resides Must have some program logic

File 3 - Error File Preconfigured and Open file Referred to as the Error Subroutine Will be “scanned” whenever a recoverable fault is detected (Allows users to clear certain errors and inhibit a shutdown) Recoverable faults include: Retentive data lost (0005) Startup protection after power loss (0016) Minor Error at end of scan (0020) File boundaries violated ( Sequencers 0032, Stacks and Bit Shifts (0033) Negative data in ACC or PRE of a timer (0034) Invalid HSC preset (0037) May be used as a user subroutine, but is not recommended

File 4 - High Speed Counter File Preconfigured and Open file Referred to as the HSC Subroutine Will be “scanned” whenever a HSC interrupt occurs HSC Interrupts are: “Preset” data value is reached (High or Low) Underflow or Overflow conditions are detected May be used as a user subroutine, but is not recommended

File 5 - Selectable Timed Interrupt File Preconfigured and Open file Referred to as the STI subroutine Scanned whenever the STE instruction is set (1) Adjustable interval, 10msec resolution May be used as a user subroutine, but is not recommended

Files 6-15 - User Subroutines “Open” Files Typically used for application specific requirements. Accessed from file 2 (Main program) through special program flow instructions JSR Jump to Subroutine and return SBR Subroutine Identifier RET Ret to Main program Nesting of subroutines is allowed (8 Levels allowed, 3 Levels if the Error, HSC or STI subroutines are enabled) MicroLogix 1000 and SLC 500 only

Relay Ladder Logic (RLL) What is Relay Ladder Logic? Is the primary programming language for PLCs A graphical representation of the program designed to look like relay logic

Ladder Logic Concepts | | ( ) | | |/| | | | | |/| | | |/| | | | | |/| Read / Conditional Instructions Write / Control Instructions | | Start (Rung #1) ( ) | | |/| | | | | |/| | | |/| | | | | |/| ( ) End (Rung #5)

Ladder Logic Concepts |/| | | ( ) |/| |/| T F F T T T Read / Conditional Instructions Write / Control Instructions |/| | | ( ) T F F No Logical Continuity |/| |/| T T T Logical Continuity

Logical AND Construction IF input 4 AND input 5 have power THEN energize output 0 On | | I/4 | | I/5 ( ) O/0 T T T Logical Continuity

Logical OR Construction IF input 4 OR input 5 have power THEN energize output 0 T On | | I/4 ( ) O/0 Logical Continuity | | I/5 F F On | | I/4 ( ) O/0 Logical Continuity | | I/5 T

Complex Construction | | |/| | | | | |/| ( ) | | | | |/| |/| | | | |

Read Instructions -| |- -|/|- The instruction is: If the input device is The input bit is Examine ON -| |- XIC Examine OFF -|/|- XIO Open (0) Logic 0 False True Closed (1) Logic 1 True False

Write Instruction -( )- Rung State Output Bit Output Terminal OTE | | |/| ( ) T Rung State Output Bit Output Terminal OTE Output Energize -( )- TRUE ON ENERGIZED FALSE OFF De-energized

Putting it Together | | ( ) I/8 O/0 PB1 Supply Voltage Unused Unused COM I / 0 I / 1 I / 2 I / 3 I / 4 COM I / 5 I / 6 I / 7 I / 8 I / 9 L 1 L 2 / N GND VAC O / 0 VAC O / 1 VAC O / 2 VAC O / 3 VAC O / 4 O / 5 VDC VDC VDC VDC VDC Supply Voltage I/8 O/0 | | ( )

Addressing Example | | | | | | ( ) HHP I/5 I/6 I/7 O/0 Logix I:0/5 PB1 LS1 PS2 SOL6 I/5 I/6 I/7 O/0 | | | | | | ( ) HHP I/5 I/6 I/7 O/0 Logix I:0/5 I:0/6 I:0/7 O:0/0 ADDRESS DEVICE PB1 LS1 PS2 SOL6

Relay Logic to Ladder Logic |/| CR3 M1 PB1 LS1 SOL2 PB2 LS3 LS4 I/4 I/6 O/0 O/1 | | ( ) I/5 I/7 B/0 |/| I/8 I/9 | | Again, the similarities are virtually identical. The primary enhancement is that if changes are needed, or if other logic or conditions need to be added, it’s as simple as a few keystrokes on the computer. INPUT Address Assignment: PB1- I/4 PB2- I/5 LS1- I/6 LS2- I/7 LS3- I/8 LS4- I/9 OUTPUT Address Assignment: SOL2- O/0 M1- O/1 29