NA Silicon Wafer Committee Liaison Report Updated November 19, 2010

Meeting Information Last meeting Next meeting Tuesday, November 09, 2010, NA Fall Standards Meeting Intel in Santa Clara, CA Next meeting Tuesday, March 29, 2011, NA Spring Standards Meeting Location – to be determined Either @ Cymer in San Diego or SEMI HQ in San Jose. www.semi.org/standards for the latest update

NA Spring draft schedule Monday, March 28 08:00-09:00 Int'l 450 mm Wafer (TF) 09:00-10:00 Int'l Epi Wafer (TF) 10:00-11:00 Int'l Advanced Surface Inspection (TF) 11:00-12:00 Int'l Test Methods (TF) 13:00-17:00 Int'l Advanced Wafer Geometry (TF) Tuesday, March 29 08:00-09:00 Int'l Polished Wafer (TF) 09:00-12:00 Silicon Wafer (C)

NA Silicon Wafer Committee Committee Chairmen Dinesh Gupta /STA Noel Poduje /SMS

Ballots passed review at Fall Meeting [1] Document 4927, Line Items Revision of SEMI M1-1109 Specifications for Polished Single Crystal Silicon Wafers • Line Item 1 - Change ¶ 2.1 as follows • Line Item 2 - Add the following after EM-3504 in ¶ 3.3 JEITA Standards and modify parts of table 1 • Line Item 3 - Removing T1 and T2 Document, 4928, Line Items Revision of SEMI M59-0310 Terminology for Silicon Technology • Line Item 1 - Change the definition of ingot in SEMI M59-0310 as follows • Line Item 2 - Add the following definition to §5 of SEMI M59 (in proper alphabetical order) Document, 5036, Withdrawal of SEMI M34-0299 Guide for Specifying SIMOX Wafers Document, 5037, Reapproval of SEMI M44-0305 Guide For Measurement Of Interstitial Oxygen In Silicon

Ballots passed review at Fall Meeting [2] Document, 5038, Reapproval of SEMI MF26-0305 Test Method For Determining The Orientation Of A Semiconductive Single Crystal Document, 5039, Reapproval of SEMI MF928-0305 Test Method For Edge Contour Of Circular Semiconductor Wafers And Rigid Disk Substrates Document, 5040, Reapproval of SEMI MF1152-0305 Test Method For Dimensional Notches Document, 5041, Reapproval of SEMI MF1239-0305 Test Method For Oxygen Precipitation Characteristics Of Silicon Wafers By Measurement Of Interstitial Oxygen Reduction Document, 5042, Reapproval of SEMI MF951-0305 Test Method For Determination Of Radial Interstitial Oxygen Variation In Silicon Wafers

Ballots approved for cycle 1-2011 [1] Doc. 5043, Revision of MF1048-1109 Test Method for Measuring the Reflective Total Integrated Scatter Doc. 5081, Reapproval of SEMI MF42-1105 - Test Methods for Conductivity Type of Extrinsic Semiconducting Materials Doc. 5082, Reapproval of SEMI MF43-0705 - Test Methods for Resistivity of Semiconductor Materials Doc. 5083 , Reapproval of SEMI MF81-1105 - Test Method for Measuring Radial Resistivity Variation on Silicon Wafers Doc. 5084, Reapproval of SEMI MF154-1105 - Guide for Identification of Structures and Contaminants Seen on Specular Silicon Surfaces

Ballots approved for cycle 1-2011 [2] Doc. 5085, Reapproval of SEMI MF374-0307 - Test Method for Sheet Resistance of Silicon Epitaxial, Diffused, Polysilicon, and Ion-implanted Layers Using an In-Line Four-Point Probe with the Single-Configuration Procedure Doc. 5086, Reapproval of SEMI MF525-0307 - Test Method for Measuring Resistivity of Silicon Wafers Using a Spreading Resistance Probe Doc. 5087, Reapproval of SEMI MF673-1105 - Test Method for Measuring Resistivity of Semiconductor Wafers or Sheet Resistance of Semiconductor Films with a Noncontact Eddy-Current Gauge Doc. 5088, Reapproval of SEMI MF674-0705 - Practice for Preparing Silicon for Spreading Resistance Measurements Doc. 5089, Reapproval of SEMI MF847-0705 - Test Method for Measuring Crystallographic Orientation of Flats on Single Crystal Silicon Wafers by X-Ray Techniques

Metrology Group Int’l Advanced Wafer Geometry TF/Noel Poduje (SMS) Kevin Turner/University of Wisconsin presented “Mechanics Modeling of the Effect of Back Surface Nanotopography in CMP Processes” Backside nanotopography affect polishing pressure and resulting oxide clearing and nitride thinning New SNARF (doc. 5091) Revision of SEMI M49-1108 - Guide for Specifying Geometry Measurement Systems for Silicon Wafers for the 130 nm to 22 nm Technology Generations (Re: ZDD parameter) A questionaire is being circulated to survey industry’s value on ESFQR and ZDD parameters from 45 nm through 16 nm node

Metrology Group Int’l Advanced Surface Inspection TF/John Stover (TSW) Doc 4766 Revision to M52-0307 Guide for Specifying SSIS for Si. Wafers for the 130 nm, 90 nm, 65 nm, and 45 nm Technology Generations Discussed 20 nm Design Rule level for 450 mm Involvement from wafer manufacturers needed Doc. 5043, Revision to MF1048-1109 Test Method for Measuring the Reflective Total Integrated Scatter, The rewrite is necessary because of errors found in the existing document and the need to expand it slightly for use in a PV Task Force As an exception, GCS is asked for ballot to be reviewed at NA Spring meeting due to its technical flaw that is currently being published

Specifications Group Int’l 450 mm Wafer TF/Mike Goldstein (Intel) New SNARF (doc. 5090) approved for inclusion of 450 mm polished wafer specification in SEMI M1. Discussed the update of the 450 mm test wafer development status.

Specifications Group Int’l SOI Wafer TF/George Celler (SOITEC) Published SEMI M71-0310 - Specification for Silicon-on-Insulator (SOI) Wafers for CMOS LSI New SNARF 5034, Revision of M71 Extension of the SOI film thickness from the current 20 nm minimum to a new minimum of 10 nm or even a lower limit. Both SEMI M47-0707 and M34-0299 were approved for withdrawn. M71 supersede these withdrawn standards

Specifications Group Int’l Epitaxial Wafer TF/Dinesh Gupta (STA) Doc. 5035 Revision to SEMI M62-0309 - Specifications for Silicon Epitaxial Wafers Adding 22 nm epi guide Received one persuasive reject from Tetsuya Nakai-san Discussed ballot results at NA Fall meeting TF revised draft and recommended to reballot in cycle 1 for review in San Francisco at SEMICON West 2011

Specifications Group Int’l Polished Wafer TF/Murray Bullis (Materials & Metrology) Doc. 4927 Rev. of SEMI M1-1109 Spec. for Polished Single Crystal Silicon Wafers To include Bulk Micro Defect (BMD) requirements since BMD test method is completed and published in Japan as JEITA EM 3508 To remove T1 and T2 from SEMI M1 since they were withdrawn by Traceability committee Ballot was approved

Committee TF Int’l Terminology TF/Murray Bullis (Materials & Metrology) Revision SEMI M59-1110, Terminology for Silicon Technology Ballot passed regarding the terms ingot and crystal originated pit Future works include polysilicon, wafer packaging, microscopy and optics terms

Committee TF Int’l Test Methods TF/Dinesh Gupta (STA) [1] All 5 year review ballots were approved SEMI M44-0305, SEMI MF26-0305, SEMI MF928-0305, SEMI MF951-0305, SEMI MF1152-0305, SEMI MF1239-0305 New 5 year ballot review approved for cycle 1-2011 Reapproval of SEMI MF42-1105 - Test Methods for Conductivity Type of Extrinsic Semiconducting Materials Reapproval of SEMI MF43-0705 - Test Methods for Resistivity of Semiconductor Materials Reapproval of SEMI MF81-1105 - Test Method for Measuring Radial Resistivity Variation on Silicon Wafers

Int’l Test Methods TF/Dinesh Gupta (STA) [2] Reapproval of SEMI MF154-1105 - Guide for Identification of Structures and Contaminants Seen on Specular Silicon Surfaces Reapproval of SEMI MF374-0307 - Test Method for Sheet Resistance of Silicon Epitaxial, Diffused, Polysilicon, and Ion-implanted Layers Using an In-Line Four-Point Probe with the Single-Configuration Procedure Reapproval of SEMI MF525-0307 - Test Method for Measuring Resistivity of Silicon Wafers Using a Spreading Resistance Probe Reapproval of SEMI MF673-1105 - Test Method for Measuring Resistivity of Semiconductor Wafers or Sheet Resistance of Semiconductor Films with a Noncontact Eddy-Current Gauge Reapproval of SEMI MF674-0705 - Practice for Preparing Silicon for Spreading Resistance Measurements Reapproval of SEMI MF847-0705 - Test Method for Measuring Crystallographic Orientation of Flats on Single Crystal Silicon Wafers by X-Ray Techniques

Committee’s Decision on Patents [1] SEMI MF1708 - Practice for Evaluation of Granular Polysilicon By Melter-zoner Spectroscopies and SEMI MF723 - Practice for Conversion Between Resistivity and Dopant or Carrier Density for Boron-Doped, Phosphorus-Doped, and Arsenic-Doped Silicon SEMI MF1724 - Test Method for Measuring Surface Metal Contamination of Polycrystalline Silicon by Acid Extraction-Atomic Absorption Spectroscopy US5436164, Analytical Method for Particulate Silicon Not material because “silicon vessel” as cited in claims is not used in these documents US5361128, Method for Analyzing Irregular Shaped Chunked Silicon for Contaminants Not material because “zonable chunks” as cited in claims is not used in these documents JP11204791, Method for Analyzing Impurity of Polycrystalline Silicon Pending until English translation is obtained. However, the committee believes that this patent may also not be related as this patent relates to Activation analysis and ICP-MS techniques but these documents do not.

Committee’s Decision on Patents [2] SEMI M1-1109 - Specifications for Polished Single Crystal Silicon Wafers ESFQR in SEMI M67-1109 - Practice for Determining Wafer Near-Edge Geometry from a Measured Thickness Data Array Using the ESFQR, ESFQD and ESBIR Metrics ROA in SEMI M77-1110 - Practice for Determining Wafer Near-edge Geometry Using Roll-off Amount, ROA Committee found ESQR and ROA not material base on their presence in SEMI M1 since the actual practices are not listed in M1.

Contact For more information, please contact Kevin Nguyen at knguyen@semi.org