CS 235 Computer Organization & Assembly Language Branching & Shifting CS 235 Computer Organization & Assembly Language

Two’s Complement Branching Conditions When the numbers are signed (two’s complement), the branching conditions introduced earlier are appropriate. bl branch < 0 (N xor V) = 1 ble branch <= 0 Z or (N xor V)=1 be branch == 0 Z = 1 bne branch != 0 Z = 0 bge branch >= 0 (N xor V) = 0 bg branch > 0 Z or (N xor V)=0

How are Conditions Set? Signed numbers Z is set when all bits of the result are 0 N is set when the msb is 1 V is set 1) when the register is not long enough to hold the result 2) on subtraction, d = m – s, when the sign of d is the same as the sign of s and the sign of m is different from s For example, most_negative – any_positive_number (-8) – (2) = 10, not representable in 4 bits

Conditions with Unsigned Arithmetic No N flag!!! Condition codes set differently On addition, a carry out of the msb indicates overflow and the carry bit C is set On subtraction. We imagine an extra bit to the left of the number. By forming the two’s complement of the subtrahend, and adding, we would expect a carry out of the most significant bit to be added to the imaginary bit to indicate a positive result. So the C bit is set if there is no carry out of the msb. Result: the test for unsigned overflow is a test of the carry bit C.

4 Bit Examples 1) 12 1100 09 1001 21 10101 On addition, the carry bit set indicates overflow.

4 Bit Examples 2) 12 1100 - 09 0111 = (10000 –1 - 1001) +1 03 10011 and the carry indicates a correct result

4 Bit Examples 3) 09 1001 - 12 0100 = (10000 –1 - 1100) +1 21 01101 The carry bit is not set, so the result is incorrect

Unsigned Branching Conditions When the numbers are unsigned, the branching conditions are different. blu branch < 0 C = 1 bleu branch <= 0 Z or C =1 be branch == 0 Z = 1 bne branch != 0 Z = 0 bgeu branch >= 0 C = 0 bgu branch > 0 Z and C =0

Condition Code Tests based directly upon condition codes bneg branch on negative N = 1 bpos branch on positive N = 0 bz branch on zero Z = 1 bnz branch on not zero Z = 0 bvs branch overflow set V = 1 bvc branch no overflow V = 0 bcs branch carry set C = 1 bcc branch carry clear C = 0

Shifting Three shifts Shift right logical srl rs1, rs2_or_im, rdest Shift right arithmetic sra rs1, rs2_or_im, rdest Shift left logical sll rs1, rs2_or_im, rdest The rs1 is shifted the numbers of bits in the second operand and the result is stored in the destination

Shift is a Multiply by 2 A fast multiply Used instead of .mul Consider %o0 * 11 1110 = 10112 = 8 + 2 + 1 sll %o0, 3, %o1 ! 8*x sll %o0, 1, %o2 ! 2*x add %o0, %o1, %o3 ! x + 8*x add %o2, %o3, %o3 ! 8*x + 2*x + x ! = 11*x

SPARC Boolean Opcodes Recall Boolean Operations (02:38) andcc regs1, reg_or_imm, regdest andncc regs1, reg_or_imm, regdest xorcc regs1, reg_or_imm, regdest orcc regs1, reg_or_imm, regdest xnorcc regs1, reg_or_imm, regdest orncc regs1, reg_or_imm, regdest