UNIZH and EPFL at LHCb.

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Presentation transcript:

UNIZH and EPFL at LHCb

LHCb “TELL1” data acquisition board EPFL LHCb is a single arm spectrometer that is designed to study CP violation in the B-meson system. “TELL1” data acquisition board EPFL The Trigger Tracker (TT) UNIZH The Vertex Locator (VeLo) EPFL The Inner Tracker (IT) UNIZH+EPFL July 6, 2006

Proton-proton collision at the LHC VeLo, TT, and IT are the main elements to reconstruct the charged particles trajectories Inner and Outer tracker Spectrometer magnet RICH VeLo TT Inner tracker region track curvature ~ 1/momentum July 6, 2006

VeLo, TT and IT at LHCb Space for the Inner Tracker Space for the Velo and TT July 6, 2006

The Support bridge for the IT (and OT) The outer tracker (in maintenance position) The inner tracker boxes Rail system Carbon fiber support Service boxes (ADCs, voltages, etc.) July 6, 2006

The Inner Tracker (one of 3 stations) Dimensions in mm The Inner Tracker consists of 3 stations, with 4 detector boxes per station. Each detector box comprises 4 layers of detectors. Each layer consists of 7 modules (long or short). Thus 336 modules in total, i.e. 4.3m2 silicon sensors. The LHCb Inner Tracker covers the high particle density region near the beam pipe. July 6, 2006

The Modules p-n silicon sensors with 384 strips of 108mm long Hybrid with 3 “beetle” readout chips A ‘short’ (1 sensor) module The sensors are aligned with respect to their edges, and placed on transfer jig. The glue is applied with an automatic glue dispenser. July 6, 2006

DAQ processor board “TELL1” has been adopted as the LHCb common readout-board A total of 30 Gbit/s of data can be accepted over two 12-way optical fiber ribbon cables. Large FPGAs (Field Programmable Gate Arrays) are employed to process the incoming data in pipeline mode. The output is on custom-made Gigabit Ethernet cards. A Linux PC is embedded on the card to control and monitor the processing. Embedded Linux PC Optical receiver cards TTC Gigabit Ethernet card FPGA processors The cost for 350 TELL1 modules is 1.1MCHF. July 6, 2006

“TELL1” EPFL-Tsinghua collaboration A large amount of code must be developed for the description of the processing in the FPGAs. Since 2003 Tsinghua University (Beijing) is participating in the Gigabit Ethernet card production and TELL1 code development. Post docs and PhD students have worked during the last two years at the EPFL. July 6, 2006