Direct Memory Access Introduction

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Presentation transcript:

Direct Memory Access Introduction Consider a typical system consisting of a CPU ,memory and one or more input/output devices as shown in fig. Assume one of the I/O devices is a disk drive and that the computer must load a program from this drive into memory. The CPU would read the first byte of the program and then write that byte to memory. Then it would do the same for the second byte, until it had loaded the entire program into memory. cont

This process proves to be inefficient This process proves to be inefficient. Loading data into, and then writing data out of the CPU significantly slows down the transfer. The CPU does not modify the data at all, so it only serves as an additional stop for data on the way to it’s final destination. The process would be much quicker if we could bypass the CPU & transfer data directly from the I/O device to memory. Direct Memory Access does exactly that.

Computer System with DMA

Implementing DMA in a Computer System A DMA controller implements direct memory access in a computer system. It connects directly to the I/O device at one end and to the system buses at the other end. It also interacts with the CPU, both via the system buses and two new direct connections. It is sometimes referred to as a channel. In an alternate configuration, the DMA controller may be incorporated directly into the I/O device.

Data Transfer using DMA Controller To transfer data from an I/O device to memory, the DMA controller first sends a Bus Request to the CPU by setting BR to 1. When it is ready to grant this request, the CPU sets it’s Bus grant signal, BG to 1. The CPU also tri-states it’s address,data, and control lines thus truly granting control of the system buses to the DMA controller. The CPU will continue to tri-state it’s outputs as long as BR is asserted. cont

DMA Transfer Modes Modes vary by how the DMA controller determines when to transfer data, but the actual data transfer process is the same for all the modes. BURST mode Sometimes called Block Transfer Mode. An entire block of data is transferred in one contiguous sequence. Once the DMA controller is granted access to the system buses by the CPU, it transfers all bytes of data in the data block before releasing control of the system buses back to the CPU. This mode is useful for loading programs or data files into memory, but it does render the CPU inactive for relatively long periods of time. cont

CYCLE STEALING Mode Viable alternative for systems in which the CPU should not be disabled for the length of time needed for Burst transfer modes. DMA controller obtains access to the system buses as in burst mode, using BR & BG signals. However, it transfers one byte of data and then deasserts BR, returning control of the system buses to the CPU. It continually issues requests via BR, transferring one byte of data per request, until it has transferred it’s entire block of data. cont

By continually obtaining and releasing control of the system buses, the DMA controller essentially interleaves instruction & data transfers. The CPU processes an instruction, then the DMA controller transfers a data value, and so on. The data block is not transferred as quickly as in burst mode, but the CPU is not idled for as long as in that mode. Useful for controllers monitoring data in real time.

TRANSPARENT Mode This requires the most time to transfer a block of data, yet it is also the most efficient in terms of overall system performance. The DMA controller only transfers data when the CPU is performing operations that do not use the system buses. For example, the Relatively simple CPU has several states that move or process data solely within the CPU: NOP1: (No operation) LDAC5: ACDR cont

JUMP3: PCDR,TR CLAC1: AC0, Z1 Primary advantage is that CPU never stops executing its programs and DMA transfer is free in terms of time. Disadvantage is that the hardware needed to determine when the CPU is not using the system buses can be quite complex and relatively expensive.

Summary Advantages of DMA Disadvantages of DMA Computer system performance is improved by direct transfer of data between memory and I/O devices, bypassing the CPU. CPU is free to perform operations that do not use system buses. Disadvantages of DMA In case of Burst Mode data transfer, the CPU is rendered inactive for relatively long periods of time.