How to Delegate Computations: The Power of No-Signaling Proofs

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Presentation transcript:

How to Delegate Computations: The Power of No-Signaling Proofs Ran Raz (Weizmann Institute & IAS) Joint work with: Yael Tauman Kalai Ron Rothblum

Delegation of Computation

Delegation of Computation: Alice has 𝒙 ∈ {𝟎,𝟏} 𝒏 Alice needs to compute 𝒇 𝒙 , where 𝒇 is publicly known Bob offers to compute 𝒇 𝒙 for Alice Alice sends 𝒙 to Bob Bob sends 𝒇 𝒙 to Alice 𝒙 𝒇(𝒙)

1-Round Delegation Scheme for 𝒇 : 𝑽 accepts or rejects 1) Completeness: if 𝑷 is honest: 𝐏𝐫 V accepts =𝟏−neg 2) Soundness: ∀ 𝑷 ∗ ∈Time[ 𝒕 ∗ 𝒏 ], if 𝒃≠𝒇(𝒙): 𝐏𝐫 V rejects =𝟏−neg 3) Running time of 𝑷: poly(𝒕(𝒏)) 4) Running time of 𝑽: ≪𝒕(𝒏) 𝑽 𝑷 𝒙,𝒒 𝒃=𝒇 𝒙 ,𝒘 𝒇 ∈Time[𝒕 𝒏 ]

Previous Work [GKR+KR]: If 𝒇 is a logspace-uniform circuit of size 𝒕 and depth 𝒅: 1-round delegation scheme s.t.: Running time of 𝑷: poly(𝒕) Running time of 𝑽: 𝑶 (𝒏+poly 𝒅 ) (under exponential hardness assumptions)

1-round delegation scheme s.t.: Running time of 𝑷: poly(𝒕(𝒏)) Our Result: If 𝒇 ∈ Time[𝒕 𝒏 ] 1-round delegation scheme s.t.: Running time of 𝑷: poly(𝒕(𝒏)) Running time of 𝑽: 𝒏⋅polylog 𝒕(𝒏 ) (under exponential hardness assumptions)

Variants of Delegation Schemes: 1-Round or Interactive Computational or Statistical soundness: 1-Round, Computational: This talk! 1-Round, Statistical: Impossible! Interactive, Computational: Solved! (with only 2-rounds) [Killian,Micali], (based on MIP=NEXP) [BFL] Interactive, Statistical: [GKR 08] Many other works, under unfalsifiable assumptions, or with preprocessing.

The Approach of Aiello et al.

2-Prover Interactive Proofs [BGKW]: Provers 𝑨,𝑩 claim that 𝐱∈𝐋 𝑽 sends a query 𝒒 to 𝑨 and 𝒓 to 𝑩 no communication between 𝑨 and 𝑩 𝑨 answers by 𝐚=𝑨(𝒒) 𝑩 answers by 𝐛=𝑩(𝒓) 𝑽 decides accept/reject by 𝒒,𝒓,𝒂,𝒃 𝒒 𝒓 𝑨 𝑩 𝒂 𝒃

MIP=NEXP (scaled down) [BFL+FL]: ∀𝑳∈Time[t(n)], ∃ 2-provers MIP s.t.: 1) Completeness: if 𝑨,𝑩 are honest: 𝐏𝐫 V accepts =𝟏 2) Soundness: ∀ 𝑨 ∗ , 𝑩 ∗ if 𝒙∉𝑳: 𝐏𝐫 V rejects =𝟏−neg 3) Running time of 𝑨,𝑩: poly(𝒕(𝒏)) 4) Running time of 𝑽: 𝑶 (𝒏) 5) Communication: polylog(𝒕 𝒏 ) 𝒒 𝒓 𝑨 𝑩 𝒂 𝒃

[Aiello Bhatt Ostrovsky Sivarama 00]: MIP ⟹ 1-Round Argument ?!? MIP: 𝒒 , 𝒓 = FHE of 𝒒,𝒓 (with different keys) 𝒂 , 𝒃 = FHE of 𝐚=𝐀 𝐪 , 𝒃=𝑩(𝒓) 𝒒 𝒓 𝑨 𝑩 𝒂=𝑨(𝒒) 𝒃=𝑩(𝒓) 𝑽 𝑷 𝒒 , 𝒓 𝒂 , 𝒃

No-Signaling Strategies: 𝒂=𝑨(𝒒,𝒓,𝒛) , 𝒃=𝑩(𝒒,𝒓,𝒛) (where 𝒛 is a shared random string): Given 𝒒, the random variables 𝐚,𝒓 are independent Given 𝒓, the random variables 𝐛,𝒒 are independent 𝒒 𝒓 𝑨 𝑩 𝒂 𝒃

No-Signaling Strategies for 𝒌 provers: queries: 𝒒 𝟏 ,…, 𝒒 𝒌 , answers 𝒂 𝟏 ,…, 𝒂 𝒌 𝒂 𝒊 = 𝑨 𝒊 ( 𝒒 𝟏 ,…, 𝒒 𝒌 ,𝒛), (𝒛= random string) For every 𝑺⊂[𝒌]: Given {𝒒 𝒊 :𝒊∈𝑺}, {𝒂 𝒊 :𝒊∈𝑺}, {𝒒 𝒊 :𝒊∉𝑺}, are independent Soundness Against No-Signaling: ∀no−signaling ( 𝑨 𝟏 ,…, 𝑨 𝒌 ) ∗ , if 𝒙∉𝑳: 𝐏𝐫 V rejects =𝟏−neg

We Show (using [ABOS 00]): MIP with no-signaling soundness ⟹ 1-Round Argument (we need soundness for almost-no-signaling strategies) Corollary: Interactive Proof ⟹ 1-Round Argument (under exponential hardness assumptions) Gives a simpler proof for [KR 09] Challenge: Show stronger MIPs with no-signaling soundness 𝒒 , 𝒓 = FHE of 𝒒,𝒓 (with different keys) 𝒂 , 𝒃 = FHE of 𝐚=𝐀 𝐪 , 𝒃=𝑩(𝒓)

No-Signaling Strategies

Entangled Strategies: 𝑨,𝑩 share entangled quantum state |𝒔i 𝑨,𝑩 𝑨 gets 𝒒, 𝑩 gets 𝒓 𝑨 measures 𝑨, 𝑩 measures 𝑩 𝑨 answers 𝒂, 𝑩 answers 𝒃 Soundness Against Entangled Strategies: ∀entangled ( 𝑨 𝟏 ,…, 𝑨 𝒌 ) ∗ , if 𝒙∉𝑳: 𝐏𝐫 V rejects =𝟏−neg [IV12, V13]: MI P ∗ ⊇NEXP 𝒒 𝒓 𝑨 𝑩 𝒂 𝒃

Entangled vs. No-Signaling: Entangled strategies are no-signaling Signaling ⟹ information travels faster than light Hence, no-signaling is likely to hold in any future ultimate theory of physics No-signaling soundness is likely to ensure soundness in any future physical theory 𝒒 𝒓 𝑨 𝑩 𝒂 𝒃

MIPs with No-Signaling Soundness: No-Sig cheating provers are powerful: PSPACE⊆ no−sig MIP ⊆ EXP no−sig MIP(2)=PSPACE (by linear programing) In particular, all known protocols for MIP=NEXP are not sound for no-signaling Example: Assume: 𝑽 checks 𝐚⊕𝒃= 𝒗 𝒒,𝒓 Let 𝐚= 𝒗 𝒒,𝒓 ⊕𝒛. Let 𝐛=𝒛. (𝒛 is random) Then 𝑽 always accepts (and the strategy is no-signaling)

Our Result: no−sig MIP = EXP If 𝐋 ∈ Time 𝒕 𝒏 , MIP s.t.: Running time of 𝑷 𝟏 ,…, 𝑷 𝒌 : poly(𝒕(𝒏)) Running time of 𝑽: 𝑶 (𝒏) Number of provers: 𝐤=polylog(𝒕(𝒏)) Communication: polylog(𝒕(𝒏)) Completeness: 𝟏 Soundness: against no-sig strategies (with negligible error) (gives soundness against entangled provers)

Delegating Computation to the Martians:

Delegating Computation to the Martians: 𝐋 ∈ Time 𝒕 𝒏 Running time of provers: poly(𝒕) Running time of 𝑽: 𝑶 (𝒏) Number of provers: 𝒌=polylog(𝒕) Number of provers: polylog(𝒕) Completeness: 𝟏 Soundness: against no-sig strategies (with negligible error) 𝒒 𝟏 .. 𝒒 𝒌 𝑷 𝟏 𝑷 𝒌 𝒂 𝟏 𝒂 𝒌 𝑷 𝟐 ……

Steps of the Proof

Step I: Switch to PCP:

PCP: A proof for 𝐱∈𝐋 that can be (probabilistically) verified by reading a small number of its bits. proof is correct ) P(V accepts) = 1 𝐱∉𝐋 ) P(V accepts) ≤ ε

Soundness Against No-Signaling: ∀no−signaling PCP, if 𝒙∉𝑳: No-Signaling PCPs: For every subset 𝑺 of locations s.t. 𝑺 ≤𝑲, ∃ distribution 𝑨 𝑺 If 𝑽 queries locations 𝑺= 𝒒 𝟏 ,…, 𝒒 𝒅 , the answers are given by 𝒂 𝟏 ,…, 𝒂 𝒅 ∈ 𝑹 𝑨 𝑺 Guarantee: if 𝑺 𝟏 , 𝑺 𝟐 ≤𝑲, then 𝑨 𝑺 𝟏 , 𝑨 𝑺 𝟐 agree on their intersection Soundness Against No-Signaling: ∀no−signaling PCP, if 𝒙∉𝑳: 𝐏𝐫 V rejects =𝟏−neg

Running time of prover: poly(𝒕) Running time of 𝑽: 𝑶 (𝒏) Our Result: 𝐋 ∈ Time[𝒕 𝒏 ] PCP s.t.: Running time of prover: poly(𝒕) Running time of 𝑽: 𝑶 (𝒏) Number of queries: polylog(𝒕) Completeness: 𝟏 Soundness: against no-sig strategies with 𝑲= polylog(𝒕) (with negligible error)

Step I: Switch to PCP: PCP with no-sig soundness implies MIP with no-sig soundness. with 𝑶(𝑲) provers

Step II: Amplification Lemma: If there exists a cheating no-sig PCP that cheats our verifier with exp small prob, then there exists a cheating no-sig PCP that cheats (a slightly different verifier) with prob close to 1

Step III: Let 𝐶 be a circuit for 𝑥∈𝐿. Let 𝑦 1 ,…, 𝑦 𝑡 be the outputs of all gates of 𝐶. Our PCP contains the low degree extension of 𝑦 1 ,…, 𝑦 𝑡 We “read” each 𝑦 𝑖 by a procedure, as in locally decodeable codes. Denote these values by 𝑦 1 ,…, 𝑦 𝑡 . Note that only ≈𝐾 of 𝑦 1 ,…, 𝑦 𝑡 can be defined simultaneously. For every gate in the circuit, with parent 𝑖 and children 𝑖 1 , 𝑖 2 , we show that 𝑦 𝑖 1 , 𝑦 𝑖 2 , 𝑦 𝑖 satisfy the gate w.h.p.

Step IV: If 𝑠≪𝐾, the circuit 𝐶 is of width ≪𝐾. So all the variables in the same level of 𝐶 can be defined simultaneously. We can work our way up and prove that the output is computed correctly w.h.p.

Thank You!