Organizacija sistema zasnovana na mikropocesoru 80x86
Blok dijagram PC mašina zasnovanih na Intel-ovim procesorima
Obim magistrale podataka kod 80x86
Obim adresne magistrale kod 80x86
Memorisanje bajta, reči i duple reči kod 80x86
Organizacija memorije kod 16-bitnog procesora (8086, 80186, 80286, 80386sx)
Organizacija memorije kod 32-bitnog procesora (80386, 80486, Pentium,
Programski model mikroprocesora počev od 8086 do Pentium
8086 register set
8086 Flags Register
80386 Registers (Application Programmer Visible)
Način memorisanja podataka u registrima
Registri FLAG i EFLAGS za familiju mikroprocesora 80x86 i Pentium
Pogled na memorijski sistem
Adresiranje memorije korišćenjem adrese segment plus ofset
Konkretan primer rasporeda memorijskih segmenata bez preklapanja
Konkretan primer rasporeda memorijskih segmenata sa preklapanjem
16 segmenata koji se ne preklapaju kod 8086
Segmented Addressing as a Two-Dimensional Process
Segmented Addressing in Physical Memory in Real Mode
Converting a Logical Address to a Physical Address in Real Mode
Converting a Logical Address to a Physical Address in Protected Mode
Sistemski takt
Ciklus čitanja memorije kod 80486
Ciklus upisa u memoriju kod 80486
Dekodiranje i kašnjenje bafera
Ubacivanje stanja čekanaj u Memory Read operaciju
Unutrašnja struktura 8486 CPU-a
Interna struktura procesora Pentium
Hazardi kod 8486
Unutrašnja struktura kod 8686
Izlazni port kreiran pomoću jednog leča
Ulazno/izlazni port zahteva dva leča
Inputing Data Vector Number
Inputing Data Vector Coded
Program Developement
Adresni načini rada kod 8086
Addressing Modes on the x86 The x86 instructions use five different operand types: registers, constants, three memory addressing schemes. Each form is called an addressing mode. The x86 processors support: the register addressing mode, the immediate addressing mode, the indirect addressing mode, the indexed addressing mode, and the direct addressing mode.
Adresni načini rada za pristup podacima kod x86 EBX=00000300h; ESI=00000200h; POLJE=1000h; DS=1000h
Generisanje 32-bitne adrese
Displacement Only (Direct) Addressing Mode
Accessing a Word
[BX] Addressing Mode
[BP] Addressing Mode
[BX+disp] Addressing Mode
[BP+disp] Addressing Mode
[BX+SI] Addressing Mode
[BP+SI] Addressing Mode
[BX + SI + disp] Addressing Mode
[BP + SI + disp] Addressing Mode
Table to Generate Valid 8086 Addressing Modes
Mapping a 4 x 4 Array to Memory
Row Major Element Ordering
Another View of Row Major Ordering for a 4x4 Array
Column Major Element Ordering
Primer neposrednog adresiranja
Primer direktnog adresiranja
Primer registarsko-indirektnog adresiranja
Primer baznog adresiranja
Primer indeksnog adrsiranja
Primer bazno-indeksnog adresiranja
Primer bazno-indeksnog adresiranja sa razmeštajem
Format instrukcija
Format instrukcija od 8086 do Pentium
Prvi bajt opkoda, pozicija polja MOD, REG i R/M
Tipovi instrukcija kod 8086
Podela instrukcija Prenos podataka Aritmetičke Logičke Pomeračke Rotiranje Testiranje i analiza bita Manipulisanje markerima Kompariranje i postavljanje Grananje Poziv potprograma LOOP Manipulisanje nizovima
Instrukcije za prenos podataka
Sign-extend and Zero-extend Move Instructions
Exchange Data-Transfer Instructions
Translate Data-Transfer Instructions
Load Effective Address and Full Pointer Data-Transfer Instructions
Arithmetic Instructions
Arithmetic and Logical Instructions
Addition Arithmetic Instructions
Subtraction Arithmetic Instructions
Multiplication and Division Arithmetic Instructions
Logic Instructions
Shift Instructions
Rotate Instructions
Arithmetic Shift Right Operation
Shift Right Operation
Double Precision Shift Left Operation
Double Precision Shift Right Operation
Rotate Through Carry Left Operation
Rotate Through Carry Right Operation
Rotate Left Operation
Rotate Right Operation
Bit-Test and Bit-Scan Instructions
Flag-Control Instructions
Compare Instructions
Byte Set on Condition Instruction
Unconditional Jump Instruction
Coditional Jump Instructions
The control transfer instructions These instructions include the following: Other instructions: The get and put instructions let you read and write integer values. The remaining instructions do not require any operands, they are halt and brk.
Jcc Instructions That Test Flags
Jcc Instructions for Unsigned Comparisons
Jcc Instructions for Signed Comparisons
IF..THEN and IF..THEN..ELSE Statement Flow
Subroutine Call Instruction
Return Instruction
Structure of a Subroutine
Push and Pop Instructions
Push Flags and Pop Flags Instructions
Push all and Pop all Instructions
Enter and Leave Instructions
Loop Instructions
Basic String Instructions
Prefixes for Use with Basic String Instructions
Instructions for Selecting Autoincrementing and Autodecrementing in String Instructions
Symbols for Specifying Register Operands
Examples of Using Various Addressing Modes
Arithmetic, Relational, and Logical Operators
Value-Returning and Attribute Operators
Pseudo-ops of the Macroassembler
Data Pseudo-ops
Segment Pseudo-ops
Align Type Attributes PARA – paragraph alignment BYTE – byte alignment WORD – word alignment PAGE – page alignment INPAGE – inpage alignment
Combine Type Attributes
Class Attributes
Modular Programming Pseudo-ops
Org and End Pseudo-op
Listing Control Pseudo-op
Definicija segmenata – izbor memorijskog modela Uglavnom se koriste sledeći memorijski modeli: SMALL model - jedan od najčešće korišćenih modela, koji koristi 64kB memorija za program i 64kB za podatke MEDIUIM model - podaci moraju se smestiti u 64kB, a program može biti veći od 64kB. COMPACT model - suprotan je modelu MEDIUM, tj. program se mora smestiti u 64kB, a podaci u prostor veći od 64kB. LARGE model - kombinovanjem prethodna dva modela dobija se LARGE model, tj. i kôd i podatke mogu biti veći od 64kB. Jedinstvena struktura podataka kao što je polje (vektor, matrica,...) ne sme da premaši 64kB. HUGE model - program i podaci mogu da premaše 64kB a takodje i jedinstvena struktura podataka može biti veća od 64kB. TINY model - se koristi sa COM fajlovima kod kojih ukupna memorija program plus podaci ne sme da premaši 64kB. TINY model se ne može koristiti u sklopu pojednostavljene definicije segmenata.
Potpuna u odnosu na pojednostavljenu definiciju segmenata