The digital read-out for the CSC system of the experiment TOTEM at LHC

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Presentation transcript:

The digital read-out for the CSC system of the experiment TOTEM at LHC presented by Saverio MINUTOLI I.N.F.N. Genova – via Dodecaneso 33 – 16146 Genova (I) Cathode Strip Chambers, Ar/CO2/CF4 mix Telescope T1, Inelastic detector in the region 3.1 < |h| < 4.7 Shown half T1 telescope 5 planes, each 6 sextants, inside CMS muon end-cap Read-out of anode wires and cathode strips at ± 60º Three coordinates. Digital read-out chosen for both anodes and cathodes Front-End based on VLSI chip called VFAT, developed by TOTEM collaboration @ CERN Trigger implemented with groups of wires Hits and trigger bits optically transmitted LHC clock and fast commands compliant Frontier Detectors for Frontier Physics

Cathode Front-End Card F-E VFAT hybrid The VFAT chip has 128 channel inputs. Produce Hits and Trigger information Hits information is in the form of binary “hit” channel data Trigger information is in the form of a programmable fast “OR” Anode Front-End Card 10 shapes driven by T1 geometry hosts two VFAT hybrids (256 chs) 60 boards installed 11,100 channels acquired VFAT hybrid Basic architecture of the Read-out system AFEC Cathode Front-End Card hosts one VFAT hybrid (128 chs) 160 boards installed ~16,000 channels acquired CFEC Read Out Control board 36 boards installed Manages up two CSC chambers Collects hits data and trigger bits Hosts 3 optical transmission link, Ethernet 8B/10B Performs the trigger bits synchronization circuitry Embedded slow control link based on CMS-CCU device Implements Redundant Skip Fault Architecture Hosts custom spy mezzanine FPGA based ROC