تراشه ها ي منطقي برنامه پذ ير

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Presentation transcript:

تراشه ها ي منطقي برنامه پذ ير مرتضي صاحب الزماني

تراشه ها ي منطقي برنامه پذ ير Text Book: [1] Ulrich Heinkel, et al, “The VHDL Reference: A Practical Guide to Computer-Aided Integrated Circuit Design including VHDL-AMS,” Wiley, 2000. [2] Clive Maxfield, “The Design Warrior’s Guide to FPGA,” Elsevier, 2004. [3] Zoran Salcic, Asim Smailagic, “Digital Systems Design and Prototyping Using Field-Programmable Logic and Hardware Description Languages”, 2nd Edition, 2000 References: Datasheets + References given in the slides مرتضي صاحب الزماني

تراشه ها ي منطقي برنامه پذ ير Marking: Homeworks, Quizes, Project, Midterm Exam, Final Exam. Software: ModelSim, EDK, Quartus مرتضي صاحب الزماني

مدارهاي ديجيتال S مرتضي صاحب الزماني

Full-Custom مرتضي صاحب الزماني

Full-Custom مرتضي صاحب الزماني

ASIC: Application-Specific Integrated Circuits Standard Cell: عناصر در رديفها چيده مي شوند. پورتها در بالا و پايين سلولها (تکنولوژي جديد: روي سلولها). Gate Array: آرايه اي از سلولهاي مشابه. مرتضي صاحب الزماني

سلولهاي استاندارد Wires Adder MUX NAND مرتضي صاحب الزماني

سلولهاي استاندارد مرتضي صاحب الزماني

Mixed RAM/ROM Row based Control Logic Row based CPU مرتضي صاحب الزماني

Uncommitted Gate Array مرتضي صاحب الزماني

Committed Gate Array مرتضي صاحب الزماني

Gate Array MPLD يا MPGA : برنامه ريزي تراشه در زمان ساخت. FPLD : برنامه ريزي تراشه به صورت الکتريکي توسط کاربر. مرتضي صاحب الزماني

مانند Gate Array تشابه: فقط لایه‌های فلز سفارشی می‌شوند Structured ASIC مانند Gate Array تشابه: فقط لایه‌های فلز سفارشی می‌شوند هزینه ساخت ماسک‌ها خیلی کم مرتضي صاحب الزماني

مانند Gate Array تفاوت: گیت‌های خیلی پیچیده: MUX، LUT Structured ASIC مانند Gate Array تفاوت: گیت‌های خیلی پیچیده: MUX، LUT  بیشتر لایه‌های فلز ساخته شده‌اند هزینه کمتر و سرعت بالاتر و توان مصرفی کمتر مرتضي صاحب الزماني

مقايسه S مرتضي صاحب الزماني

Programmable Logic Array (PLA) مرتضي صاحب الزماني

PLA مرتضي صاحب الزماني

PLA مرتضي صاحب الزماني

PAL فقط AND Plane قابل برنامه ريزي. W = ABC + CD X = ABC + ACD + ACD + BCD Y = ACD + ACD + ABD مرتضي صاحب الزماني

Programmable Array Logic (PAL) براي پياده سازي مدارهاي ترتيبي معمولا در خروجي، FF قرار دارد. PAL 16R8 مرتضي صاحب الزماني

PAL 16R8 مرتضي صاحب الزماني

PAL 16R8 مرتضي صاحب الزماني

Simple PLD (SPLD) (22V10) مرتضي صاحب الزماني

22V10 SPLD مرتضي صاحب الزماني

SPLD Macrocell مرتضي صاحب الزماني

CPLD Interconection Wires مرتضي صاحب الزماني

بخشي از CPLD مرتضي صاحب الزماني

ساختار FPGA مرتضي صاحب الزماني

ساختار FPGA مرتضي صاحب الزماني

Logic Cell مرتضي صاحب الزماني

LUT مرتضي صاحب الزماني

Logic Cell نمونه Spartan Logic Cell مرتضي صاحب الزماني

Programmable Switch Matrix (PSM)

Programmable Lookup Tables (LUTs) Programmable routing structure SRAM-Based FPGA Programmable Lookup Tables (LUTs) Programmable routing structure [Entegra]

ASIC Hybrid FPGA & ASIC Use reconfigurable fabric to customize an ASIC Previously: FPGAs have been used to augment ASIC chips in board level Now, they can be used on a single chip ASIC مرتضي صاحب الزماني